DMA Controller Abnormality Detection in Storage CMs
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Solution Overview
Problem
In storage devices, the performance is degraded due to the CPU being used for abnormality detection in communication paths between Controller Modules (CMs), preventing it from performing other processes during data transfer and completion state reading.
Innovation Solution
A storage controlling device with a memory, a switch, and a data transfer unit that transfers data and reads transfer status from the switch, allowing the DMA controller to detect transfer status without CPU intervention, enabling parallel processing and swift abnormality detection.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the CPU reads information indicating abnormality in communication paths from the switch, then abnormality detection is achieved, but the CPU is occupied and cannot perform other processes, degrading overall performance
Solution Approach 1:
The patent extracts the abnormality detection function from the CPU by implementing a dedicated detection mechanism using the DMA controller and switch status registers. The DMA controller directly monitors switch status without CPU intervention, separating the detection function from the main processing unit and eliminating the performance degradation caused by CPU occupancy during detection operations.
2Loss of information
If the CPU is used for reading transfer status information during data transfer, then transfer status can be monitored, but the CPU is unavailable for other processes, reducing system efficiency
Solution Approach 1:
The patent implements self-service by enabling the DMA controller to autonomously monitor transfer status through direct switching status register access. The system serves itself by having the DMA controller automatically detect transfer completion and abnormalities without requiring CPU intervention, thereby eliminating idle time and allowing the CPU to perform other processes simultaneously.
Data Source
AI summary
A Controller Module (CM) includes a memory that temporarily stores therein data to be written into storage, a switch that connects to another CM and a DMA controller that transfers the data stored in the memory to the other CM via the switch. The DMA controller reads a transfer status of the transferred data from the switch and writes the read transfer status into the memory.