DMA Controller Integrity Checks for Transient Fault Detection
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Solution Overview
Problem
Current methods for detecting transient faults in computing systems are inefficient and costly, with hardware-based solutions failing to address errors within flop-based functions and software-based solutions consuming significant CPU execution cycles.
Innovation Solution
A direct memory access (DMA) controller is utilized to manage transient faults by accessing memory locations, generating data integrity values, and comparing them with reference values to detect bit-flips, thereby offloading error checking from the CPU.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If hardware-based solutions utilize dedicated parity bits or ECC to detect transient faults, then detection capability is improved, but system cost and complexity increase due to added redundancy
Solution Approach 1:
The DMA controller is enhanced to perform both its traditional data transfer function and the additional function of generating data integrity values for transient fault detection. By making the DMA controller multi-functional, the patent avoids adding separate dedicated hardware redundancy while improving transient fault detection capability.
2Reliability
If software-based solutions configure the CPU to periodically check for transient faults, then fault detection is achieved, but CPU execution cycles are significantly consumed
Solution Approach 1:
The DMA controller performs data integrity checking autonomously during normal data transfer operations without requiring CPU intervention. The controller automatically generates data integrity values and compares them with reference values, allowing the system to self-monitor for transient faults while the CPU remains free to execute other tasks.
Solution Approach 2:
Data integrity checking is performed continuously during normal DMA operations rather than requiring separate periodic CPU checks. The useful action of data transfer and the useful action of fault detection occur simultaneously, eliminating wasted CPU cycles while maintaining continuous monitoring.
3Reliability
If current hardware-based solutions are implemented, then some transient faults are detected, but errors within flop-based functions remain undetected
Solution Approach 1:
The patent changes the parameter of data being checked by utilizing the DMA controller to access and verify data in memory locations that include those associated with flop-based functions. This allows the detection mechanism to cover error types previously missed by traditional hardware solutions.
Data Source
AI summary
Various embodiments of the present disclosure relate to managing transient faults within storage elements, and in particular, to maintaining the integrity of data stored in memory. In one example embodiment, a technique for performing a data integrity process is provided. The technique first includes accessing address data stored in a first location in memory such that the address data is indicative of a second location in memory. The technique then includes accessing data stored in the second location in memory and generating a data integrity value based on the accessed data. Once generated, the technique includes performing a comparison between the data integrity value and a reference value associated with the accessed data. If the comparison shows the data integrity value matches the reference value, then the technique includes outputting a positive indication. Else, the technique includes outputting a negative indication.