Hardware DMA Descriptor Manager for SAS Data Integrity
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Solution Overview
Problem
In computer systems using serial attached storage protocols, the programming of DMA engines for data integrity checks and transfer operations is burdensome for the local processor, leading to suboptimal performance due to the need for firmware programming, which cannot keep up with increasing link rates and affects overall I/O performance.
Innovation Solution
A hardware automated mechanism for generating DMA descriptors that tracks and manages user data and Data Integrity Field (DIF) transfers, offloading the task from firmware to hardware, enabling efficient descriptor generation and management across different interfaces.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If DMA engine programming is done via firmware, then data integrity checks and transfers can be performed, but the local processor becomes burdened and overall I/O performance deteriorates
Solution Approach 1:
The DMA engine is equipped with a descriptor generation unit that enables it to automatically generate and manage its own descriptors without external firmware intervention. This self-service capability offloads the programming burden from the local processor, eliminating the performance bottleneck while maintaining data integrity through automated descriptor management including DIF tracking and insertion/stripping operations.
Solution Approach 2:
The hardware-based descriptor generation unit processes data transfer operations at accelerated speeds compared to firmware execution. By implementing dedicated hardware circuits for descriptor generation, the system achieves higher processing throughput that can keep up with increasing link rates, thereby improving overall I/O performance while maintaining data integrity checks.
2Reliability
If firmware programs the DMA engine to handle DIF expansion/compression, then data integrity is maintained, but the processor cannot keep up with increasing link rates
Solution Approach 1:
The patent replaces the software-based firmware mechanism with a hardware-based descriptor generation unit. This substitution enables the system to process data at speeds matching modern link rates (e.g., 24 Gb/s, 32 Gb/s, and beyond) by utilizing parallel hardware circuits for descriptor generation, DIF tracking, and data integrity operations, eliminating the processing bottleneck inherent in firmware execution.
Solution Approach 2:
The descriptor generation unit performs preliminary actions by pre-calculating and preparing descriptors with accurate DIF tracking information before data transfer operations begin. This includes pre-determining the number of DIF bytes to insert or strip, and preparing the descriptor structure in advance, which enables the DMA engine to process data at full link rate without processor intervention during actual data transfer.
3Manufacturing precision
If the DMA engine tracks exact user data versus data integrity data, then accurate descriptor generation is achieved, but firmware complexity increases
Solution Approach 1:
The patent extracts the complex descriptor generation logic from the firmware and implements it as a dedicated hardware descriptor generation unit within the DMA engine. This unit includes specialized circuits for tracking user data versus DIF bytes, calculating accurate transfer counts, and generating precise descriptor information. By extracting this functionality into dedicated hardware, the system achieves high descriptor accuracy while eliminating firmware complexity.
Data Source
AI summary
A storage device is disclosed. The storage device includes a storage controller. The storage controller includes a direct memory access (DMA) Descriptor Manager (DM) to generate DMA descriptors by monitoring user data and a data integrity field (DIF) transferred between a host memory and a local memory based upon a function being performed.