DMA Engine Buffer Underflow Detection for CPU Load Reduction

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Solution Overview

Problem

Current DMA technologies require significant CPU overhead to process data from external slave devices, leading to increased CPU load and performance issues due to the need for interrupting CPU flow or copying data into memory buffers, especially when throughput is low.

Innovation Solution

A method and circuit design that selectively disables the first-in-first-out receive buffer and uses an underflow mechanism to determine the last word received, minimizing CPU overhead by exploiting stall properties of transmit and receive buffers through a custom sequence of descriptors, allowing the CPU to focus on other tasks while data transfer occurs autonomously.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Extent of automation

If the CPU processes data from slave devices using traditional DMA methods, then data transfer can be performed autonomously, but the CPU overhead increases significantly due to interrupts and data copying requirements

Engineering Contradiction:
Improveautonomous data transferVSAvoidCPU load
Core Design Contradiction:
Extent of automationVSProductivity

Solution Approach 1:

The patent extracts the data processing function from the CPU by introducing a dedicated processing unit that handles slave device data independently. This separates the autonomous data transfer function (already in DMA engine) from the CPU-intensive processing function, allowing the CPU to focus on higher-level tasks while the processing unit handles data interrogation and buffer management.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent introduces a processing unit as an intermediary between the DMA engine and the CPU. This processing unit receives data from the DMA engine, processes it according to slave device requirements, and manages buffer operations, thereby mediating between the autonomous transfer mechanism and the CPU to reduce direct CPU overhead.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If the CPU interrupts to process received data from slave devices, then data can be processed in real-time, but system performance deteriorates due to CPU flow interruptions

Engineering Contradiction:
Improvereal-time data processingVSAvoidsystem performance
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The processing unit enables the system to process data autonomously without CPU intervention. It self-manages the data interrogation process, determines when data is ready, and handles buffer operations independently, thereby achieving real-time processing capability while eliminating the need for CPU interrupts and maintaining system performance.

Inventive Principle:
Principle #25Self-service

3Ease of operation

If all received data is copied into memory buffers for later processing, then CPU can avoid interruptions, but the amount of data to process increases and overall CPU load increases

Engineering Contradiction:
ImproveCPU interruption avoidanceVSAvoidCPU load
Core Design Contradiction:
Ease of operationVSProductivity

Solution Approach 1:

The patent extracts the data processing function from the CPU by introducing a dedicated processing unit that handles slave device data independently. This separates the autonomous data transfer function (already in DMA engine) from the CPU-intensive processing function, allowing the CPU to focus on higher-level tasks while the processing unit handles data interrogation and buffer management.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The processing unit applies local quality by selectively processing only the data that is actually needed from slave devices, rather than copying all received data into buffers. It interrogates the data to determine relevance and processes only necessary portions, thereby reducing the volume of data that requires CPU attention while maintaining interruption-free operation.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS8527671B2DMA engine
Publication Date: 2013.09.03 ICERA INC
  • US8527671B2 patent drawing
  • US8527671B2 patent drawing
  • US8527671B2 patent drawing

AI summary

Disclosed herein is a method of accessing a slave device from a circuit including a central processing unit, a data transfer engine, and an interface to the slave device. In one embodiment, the method includes: executing code on the central processing unit to set up the data transfer engine to access the slave device; and based on the set-up, operating the data transfer engine to supply a read request word to a transmit buffer of the interface for transmission to the slave device, and, after return of a corresponding response word to a first-in-first-out receive buffer of the interface, to disable the first-in-first-out receive buffer from receiving any further data such that the last word therein is assured to be the response word. The method further includes using an underflow mechanism of the first-in-first-out receive buffer to determine the last word therein and hence determine the response word.