DMA Offload via Segmented Memory Tokens
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Solution Overview
Problem
Conventional systems using memory as an interface between microcontrollers and DMA components are inefficient, leading to wastage of resources due to simultaneous access limitations, resulting in idle DMA and microcontroller resources.
Innovation Solution
Implementing a system with multiple memory components and tokens to enable simultaneous access by both microcontrollers and DMA components, allowing for parallel processing and data movement, thereby reducing latency and improving efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a single memory component is used as an interface between microcontroller and DMA component, then the system structure is simple, but the microcontroller and DMA cannot access memory simultaneously causing resource idle time
Solution Approach 1:
The patent divides the single memory component into multiple separate memory components (first memory component, second memory component, etc.). Each memory component can be independently accessed by the microcontroller or DMA component, enabling parallel operations. This segmentation resolves the contradiction by maintaining structural simplicity through modular design while achieving simultaneous access and improved resource utilization.
2Device complexity
If a single memory component is used for DMA operations, then the memory interface is simple, but DMA resources are idle when microcontroller is accessing memory
Solution Approach 1:
The patent segments the memory interface into multiple memory components that can be independently allocated. When the microcontroller accesses one memory component, the DMA component can simultaneously access another memory component, eliminating idle time. This segmentation allows temporal parallelism without increasing overall system complexity.
3Device complexity
If a single memory component is used for DMA operations, then the memory interface is simple, but microcontroller resources are idle when DMA is accessing memory
Solution Approach 1:
The patent divides the memory interface into multiple segments (memory components) that can be independently accessed. This allows the microcontroller to load subcommands into one memory component while the DMA component processes data from another memory component simultaneously, eliminating microcontroller idle time without complicating the overall interface structure.
4Productivity
If multiple memory components are introduced for simultaneous access, then resource utilization improves, but the system complexity increases
Solution Approach 1:
The patent introduces multiple memory components as separate, independent units. Each memory component maintains its own interface and access protocols, allowing simultaneous operations without requiring complex interconnection logic. This segmentation approach improves resource utilization while keeping each individual memory component simple and manageable.
5Loss of time
If multiple memory components are used for parallel access, then latency is reduced through interleaved operations, but the device structure becomes more complex
Solution Approach 1:
The patent segments the memory interface into multiple independent memory components that can operate in parallel. This enables interleaved data movement where the microcontroller and DMA component can simultaneously access different memory components, reducing latency through parallelism while keeping each memory component structurally simple and independent.
Data Source
AI summary
A system for improving direct memory access (DMA) offload. The system includes a processor, a data DMA engine and memory components. The processor selects an executable command comprising subcommands. The DDMA engine executes DMA operations related to a subcommand to perform memory transfer operations. The memory components store the plurality of subcommands and status data resulting from DMA operations. Each of the memory components has a corresponding token associated therewith. Possession of a token allocates its associated memory component to the processor or the DDMA engine possessing the token, making it inaccessible to the other. A first memory component and a second memory component of the plurality of memory components are used by the processor and the DDMA engine respectively and simultaneously. Tokens, e.g., the first and/or the second, are exchanged between the DDMA engine and the processor when the DDMA engine and/or the microcontroller complete accessing associated memory components.