DMA Controller Pattern Detection for Variable Data Transfers
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Solution Overview
Problem
Existing direct memory access (DMA) controllers lack flexibility in variable length data transfer mechanisms, limiting their ability to efficiently manage data transfers between memory and peripherals in microprocessor systems.
Innovation Solution
Incorporating a data register, a pattern register, a data comparator, and a control unit within the DMA controller to enable flexible data transfers by detecting matches between the data and pattern registers, allowing for conditional termination of data transfers based on predefined patterns or lengths.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a fixed length data transfer mechanism is used in DMA controller, then the device complexity is reduced, but the adaptability for variable length data transfers is limited
Solution Approach 1:
The patent implements dynamic termination capability by introducing a pattern detection mechanism that can be enabled or disabled based on transfer requirements. The control unit dynamically switches between fixed-length transfer mode (using counter comparison) and variable-length transfer mode (using pattern matching), allowing the DMA controller to adapt its behavior without requiring permanent complex circuitry for both modes simultaneously.
Solution Approach 2:
The patent makes the DMA controller universal by enabling it to perform both fixed-length and variable-length data transfers using the same hardware resources. The pattern register and comparator can be configured to work with either transfer mode, and the control unit manages both termination methods (counter-based and pattern-based), allowing a single device to handle multiple transfer requirements.
2Adaptability or versatility
If pattern detection is added to enable flexible data transfer, then the adaptability is improved, but the device complexity increases
Solution Approach 1:
The patent merges the pattern detection functionality with the existing DMA controller structure by integrating the pattern register and comparator into the control unit's existing architecture. The pattern detection mechanism shares the same data bus and control signals as the conventional DMA operations, combining multiple functions (data transfer, length verification, pattern matching) into a unified control structure rather than adding separate independent circuits.
3Measurement precision
If pattern detection mechanism is implemented, then the measurement precision for data transfer termination is improved, but the device complexity increases
Solution Approach 1:
The patent introduces a pattern register as an intermediary component that stores the expected termination pattern. The comparator then mediates between the actual transferred data and the expected pattern, providing precise termination detection. This intermediary approach allows for accurate pattern matching without requiring complex comparison logic, as the pattern register pre-stores the reference values for comparison.
Data Source
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AI summary
A direct memory access controller may comprise a data register for transferring data from a source to a destination address, a pattern register, a data comparator coupled with the data register and the pattern register, and a control unit coupled with the comparator operable to stop a data transfer if the comparator detects a match of the data register and the pattern register.