DMA PRD Pre-fetching via Queue State Feedback
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Solution Overview
Problem
Conventional DMA units face performance issues due to queue underflow or overflow during PRD pre-fetching, leading to idle states and reduced data throughput, as the timing of pre-fetching PRD entries can cause queues to become empty or full, disrupting continuous data transactions.
Innovation Solution
The proposed PRD pre-fetch method dynamically determines whether to pre-fetch PRD entries based on the state of the queues, reading additional entries when the queue is full or nearly full for DMA out transactions and when the queue is empty or nearly empty for DMA in transactions, ensuring optimal cache memory usage and preventing queue overflow or underflow.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If PRD entries are pre-fetched from the PRD table and stored in cache memory, then the DMA unit can perform data transactions more efficiently, but the queue may become empty or full causing underflow or overflow
Solution Approach 1:
The patent implements a feedback mechanism where the DMA unit continuously monitors the data storage state of queues (empty, full, or intermediate states) and dynamically adjusts the pre-fetching of PRD entries accordingly. When the queue is in an intermediate state, the DMA unit triggers pre-fetching of the next PRD entry to maintain continuous operation, thereby preventing queue underflow or overflow while maximizing data throughput.
Solution Approach 2:
The patent makes the PRD pre-fetching process dynamic by conditionally triggering pre-fetching based on real-time queue state monitoring. Instead of a fixed pre-fetching schedule, the system adapts its behavior: pre-fetching is triggered when the queue is in an intermediate state, and halted when the queue is empty or full, allowing the system to optimize performance while maintaining reliability under varying workloads.
2Reliability
If the DMA unit waits for PRD entries to be fetched before performing data transactions, then queue overflow can be prevented, but data throughput is reduced due to idle states
Solution Approach 1:
The patent applies preliminary action by pre-fetching PRD entries into cache memory before they are actually needed for data transactions. The DMA unit monitors queue states and triggers pre-fetching when the queue is in an intermediate state, so that PRD entries are ready in cache when needed, eliminating waiting idle states and maintaining continuous data throughput while preventing queue overflow.
3Productivity
If continuous PRD pre-fetching is performed, then data throughput can be maximized, but queue underflow or overflow occurs disrupting transactions
Solution Approach 1:
The patent uses feedback control where the DMA unit continuously monitors queue data storage states and uses this information to control PRD pre-fetching. Pre-fetching is triggered only when the queue is in an intermediate state, and automatically halted when the queue becomes empty or full, ensuring continuous transaction capability while maximizing throughput without causing underflow or overflow disruptions.
4Device complexity
If the DMA unit uses a fixed PRD pre-fetch mechanism, then the system complexity is reduced, but performance is degraded due to idle states and queue imbalances
Solution Approach 1:
The patent transitions from a fixed, static pre-fetching mechanism to a dynamic one that adapts to real-time queue conditions. The DMA unit incorporates simple state monitoring (empty, full, intermediate) and conditional pre-fetching triggers, adding minimal complexity while dramatically improving throughput by eliminating idle states and preventing queue imbalances that would occur with fixed pre-fetching intervals.
Data Source
AI summary
PRD (Physical Region Descriptor) pre-fetch methods for DMA (Direct Memory Access) unit are provided. When a DMA out transaction for a memory is performed, it is determined whether a first queue is full or nearly full, wherein the first queue is used to store data corresponding to the DMA out transaction. If the first queue is full or nearly full, at least one PRD entry is read from a first PRD table, and stored to a first cache. When a DMA in transaction for the memory is performed, it is determined whether a second queue is empty or nearly empty, wherein the second queue is used to store data corresponding to the DMA in transaction. If the second queue is empty or nearly empty, at least one PRD entry is read from a second PRD table, and stored to a second cache.