DMA Preemption by Saving Incomplete Copy Descriptors
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Solution Overview
Problem
The preemption of DMA controller operations during a context switch in parallel processors often exceeds system time limits due to the large number of asynchronous memory copy requests, leading to potential shutdowns.
Innovation Solution
The DMA controller is instructed to halt incomplete operations and save descriptors during a context switch, allowing for their restoration upon resume, thereby ensuring efficient resource management of the DMA operations, and their subsequent resumption without completing all outstanding operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the DMA controller continues processing all asynchronous memory copy requests during context switch, then data transfer completeness is maintained, but system time limits are exceeded causing potential shutdowns
Solution Approach 1:
The patent extracts incomplete DMA operations from the active processing queue and saves them to memory during context switch. This separates the critical path (context switch) from the non-critical path (DMA operation completion), allowing the system to switch contexts quickly while preserving DMA state for later resumption. The extracted operations are stored in a persistent memory structure that can be restored when the context is resumed.
Solution Approach 2:
The patent performs preliminary actions by saving incomplete DMA descriptors and state information to memory before the context switch completes. This preparation ensures that when the context is resumed, the DMA operations can be restarted from the saved state without requiring the system to wait for asynchronous operations to complete naturally, thus reducing context switch time while maintaining data transfer reliability.
2Loss of time
If the DMA controller halts incomplete operations during context switch, then context switch time is reduced, but operation continuity is interrupted
Solution Approach 1:
The patent discards the temporary state of incomplete DMA operations during context switch and recovers them by restoring saved descriptors and state information from memory when the context is resumed. This allows the system to halt operations temporarily for faster context switching while recovering continuity through restoration of the saved state, ensuring that operations resume from the exact point where they were interrupted.
3Reliability
If all outstanding DMA operations must complete before context switch, then data integrity is maintained, but system shutdown risk increases due to time limits
Solution Approach 1:
The patent creates a copy of the incomplete DMA operation state (descriptors, buffer addresses, operation parameters) and stores it in persistent memory. This copy preserves all necessary information for data integrity while allowing the actual DMA operations to be halted and resumed later. The copied state enables the system to meet time limits for context switching without risking shutdown, as the copied data can be restored to continue operations from the saved state.
Data Source
AI summary
A direct memory access (DMA) controller issuing memory copy operations on behalf of a shader at a parallel processor stops issuing copy operations upon a context switch at the shader for a wave. The DMA controller or a trap handler associated with the shader saves the incomplete copy operations to a region of global memory, from which the incomplete operations are restored upon a context resume for the wave.