DMA Queue Real Page Number Storage for Latency Reduction
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Solution Overview
Problem
Current DMA translation mechanisms in computer systems face inefficiencies due to high latency and power consumption, particularly because they often require frequent access to the Memory Management Unit (MMU) for address translation, which can be mitigated by using an Effective to Real Address Translator (ERAT) but at the cost of increased power and physical area for a large lookup table and ongoing lookups for each DMA request.
Innovation Solution
A system and method where the DMA queue stores real page numbers in DMA command fields, allowing for reduced MMU access frequency by using pre-validated real page numbers for subsequent DMA requests, thereby improving system performance through lower latency and power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the DMA queue accesses the MMU for all load and store instructions for address translation, then address translation is performed correctly, but latency increases and power consumption increases
Solution Approach 1:
The patent applies preliminary action by pre-fetching and storing real page numbers in the DMA command fields when the DMA queue receives them from the MMU, so that subsequent DMA requests can use these pre-stored values without requiring additional MMU accesses. This resolves the contradiction by performing the address translation work in advance, eliminating the need for repeated MMU accesses during DMA operations, thus reducing latency while maintaining translation correctness.
2Speed
If the ERAT lookup table includes a large number of entries to get good hit rates, then address translation speed improves, but power consumption increases and physical area increases
Solution Approach 1:
The patent extracts the real page number information from the MMU and stores it directly in the DMA command fields, removing the need for a large ERAT lookup table. By taking out the essential translation information (real page numbers) and storing it where it can be directly accessed during DMA operations, the system achieves fast address translation without requiring a large, power-consuming lookup table, thus resolving the contradiction between speed and power consumption.
3Reliability
If the ERAT performs a lookup for each DMA request, then address translation is performed, but latency increases
Solution Approach 1:
The patent performs address translation in advance by having the MMU provide real page numbers to the DMA queue, which stores them in the DMA command fields before the actual DMA transfer begins. This preliminary translation action eliminates the need for per-request lookups during the DMA operation, significantly reducing latency while ensuring accurate address translation is performed beforehand.
4Use of energy by stationary object
If the DMA queue stores real page numbers in DMA command fields, then MMU access frequency decreases and power consumption decreases, but device complexity increases
Solution Approach 1:
The patent makes the DMA command fields multi-functional by using them to store both the original command information and the real page numbers. This universal use of existing storage structures allows the system to reduce MMU access frequency and power consumption without adding separate dedicated storage structures, thereby minimizing the increase in device complexity while achieving energy savings.
Data Source
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AI summary
A system and method for improved DMAC translation mechanism is presented. DMA commands are "unrolled" based upon the transfer size of the DMA command and the amount of data that a computer system transfers at one time. For the first DMA request, a DMA queue requests a memory management unit to perform an address translation. The DMA queue receives a real page number from the MMU and, on subsequent rollout requests, the DMA queue provides the real page number to a bus interface unit without accessing the MMU until the transfer crosses into the next page. Rollout logic decrements the DMA command's transfer size after each DMA request, determines whether a new page has been reached, determines if the DMA command is completed, and sends write back information to the DMA queue for subsequent DMA requests.