DMA Return Value Storage for Atomic Functions in Thread Synchronization
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Solution Overview
Problem
Existing memory architectures do not support return values from atomic functions during direct memory access (DMA) operations, necessitating additional computation time and configuration to retrieve data, which hampers synchronization and coordination between execution threads.
Innovation Solution
Implementing a system with a first DMA engine to request DMA operations and a second DMA engine to receive and store return values at a source memory, enabling support for atomic function return values during DMA operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If existing memory architecture is used for DMA operations, then DMA functionality is available, but return values from atomic functions cannot be stored and additional computation time is required
Solution Approach 1:
The DMA engine is divided into functional components: a first DMA engine that executes atomic operations and a second DMA engine that handles return value storage. This segmentation allows each component to specialize in its function, with the first engine performing atomic operations and the second engine managing memory storage for return values, thereby eliminating the need for additional computation time while maintaining DMA functionality.
Solution Approach 2:
A return value buffer is introduced as an intermediary mechanism between the atomic operation execution and the retrieval of return values. This buffer temporarily stores return values from atomic functions, allowing threads to efficiently access synchronization data without requiring additional computation or complex memory architecture modifications.
2Adaptability or versatility
If return value storage is added to memory architecture, then return values from atomic functions can be stored, but device complexity increases
Solution Approach 1:
The return value buffer serves multiple functions: it stores return values from atomic operations, enables synchronization between threads, and provides coordination data for DMA operations. By making this single component multi-functional, the system achieves return value support without proportionally increasing device complexity, as one buffer handles multiple purposes rather than requiring separate dedicated structures.
Solution Approach 2:
The second DMA engine automatically handles return value storage and retrieval operations without requiring manual intervention or complex configuration from the host system. The engine self-manages the buffering and transmission of return values, reducing the operational complexity burden on the system architecture while maintaining adaptability for return value support.
Data Source
AI summary
A memory architecture may provide support for any number of direct memory access (DMA) operations at least partially independent of the CPU coupled to the memory. DMA operations may involve data movement between two or more memory locations and may involve minor computations. At least some DMA operations may include any number of atomic functions, and at least some of the atomic functions may include a corresponding return value. A system includes a first direct memory access (DMA) engine to request a DMA operation. The DMA operation includes an atomic operation. The system also includes a second DMA engine to receive a return value associated with the atomic operation and store the return value at a source memory.