DMA Engine Scatter-Gather Data Transfer for PCI Bus Delays
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Solution Overview
Problem
Data transfer delays occur in processing systems using PCI buses due to the target device not being ready to transfer data, affecting system performance.
Innovation Solution
A data processing device equipped with a DMA engine that receives data from a bus, processes it using a contiguous scatter-gather list, and writes the configured data back to the bus, optimizing data transfer by acting as a PCI master for faster writes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If data is read from a device by a PCI master, then data transfer can occur, but the data may be delayed due to the target device not being ready to transfer data
Solution Approach 1:
The patent introduces a DMA engine as an intermediary device between the PCI bus and memory. The DMA engine receives data from the PCI bus and independently manages the data transfer to memory using scatter-gather lists, eliminating the need for the processor to wait for memory readiness. This intermediary handles the data transfer autonomously, resolving the timing mismatch between data production and consumption.
Solution Approach 2:
The system prepares scatter-gather lists in advance that describe the memory destination structure before data arrives. The DMA engine uses these pre-configured lists to immediately direct incoming data to the appropriate memory locations without waiting for memory readiness signals, thereby eliminating delays caused by target device unavailability.
2Productivity
If the processor acts as PCI master to write data to memory, then data transfer can occur, but system performance is affected due to delays
Solution Approach 1:
The patent extracts the data transfer function from the processor by implementing a dedicated DMA engine. The processor is removed from the data transfer path entirely, allowing it to focus on computation while the DMA engine handles all data movement operations. This separation eliminates the processor's involvement in waiting for memory readiness, thereby improving overall system performance.
Solution Approach 2:
The DMA engine operates autonomously to manage data transfer without processor intervention. It self-configures using scatter-gather lists and independently executes the data movement to memory, making the system self-sufficient in handling data transfer operations and eliminating delays caused by processor-bus coordination overhead.
3Adaptability or versatility
If traditional PCI bus configuration is used, then device connectivity is achieved, but data transfer efficiency is reduced due to target device readiness delays
Solution Approach 1:
The patent implements dynamic scatter-gather lists that can be configured at runtime to adapt to different data transfer scenarios. The DMA engine dynamically adjusts data transfer parameters based on the scatter-gather list contents, allowing flexible adaptation to various memory configurations while maintaining high transfer speeds through efficient batched data movement operations.
Data Source
AI summary
A data processing device is provided. The data processing device includes a first port configured to receive data from a first bus, and a direct memory access (DMA) engine coupled to the first port. The DMA engine is configured to receive the data from the first bus, receive a contiguous scatter-gather list from a processing device via a second port, configure the data according to the contiguous scatter-gather list, and provide the configured data to the processing device through the second port. The second port is configured to write the configured data to the processing device over a second bus.