Digital Microphone Clock Switching for Low Power Keyword Detection
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing digital microphone systems face challenges in implementing low power keyword detection and noise suppression due to conflicting requirements for power optimization, latency, and compatibility with existing interfaces, particularly in transitioning from internal to external clock rates and handling buffered audio data.
Innovation Solution
The system receives acoustic signals from both digital and analog microphones, with buffered data transmitted at a higher clock frequency to eliminate delay, allowing for real-time audio processing and noise suppression, while maintaining compatibility with conventional interfaces and minimizing latency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If the DMIC operates in an always-on standalone manner with internal oscillator for first stage keyword recognition, then power consumption is reduced, but latency increases and compatibility with existing interfaces deteriorates
Solution Approach 1:
The DMIC dynamically switches between two operational modes: an always-on low-power mode using internal oscillator for keyword recognition, and a real-time mode using external clock for audio data transmission. This dynamic switching allows the system to optimize between power consumption and latency based on operational requirements.
Solution Approach 2:
The system performs preliminary keyword recognition using the internal oscillator before switching to external clock mode. By completing the first stage of processing in advance in low-power mode, the system minimizes latency impact while maintaining power efficiency during idle periods.
2Use of energy by moving object
If the DMIC transmits buffered audio data from internal oscillator to external device, then power is saved, but interface compatibility and timing synchronization become more difficult
Solution Approach 1:
The patent introduces a timing recovery mechanism as an intermediary between the internal oscillator and external device. This intermediary component automatically adjusts for timing differences between the internal and external clocks, simplifying the interface requirements while maintaining power savings.
Solution Approach 2:
The system changes the clock frequency parameter dynamically - using internal oscillator frequency for power-saving operation and switching to external clock frequency for data transmission. This parameter change allows the same hardware to operate in different power and performance regimes without increasing interface complexity.
3Measurement precision
If real-time audio data is transmitted at externally provided clock rate, then processing accuracy is improved, but power consumption increases
Solution Approach 1:
The audio processing task is segmented into two stages: first stage uses internal oscillator for keyword detection with lower precision requirements and reduced power consumption, while the second stage uses external clock for high-precision speech recognition only when needed. This segmentation allows the system to achieve high processing accuracy when required while maintaining low power consumption during idle periods.
Data Source
AI summary
Provided are systems and methods for utilizing digital microphones in low power keyword detection and noise suppression. An example method includes receiving a first acoustic signal representing at least one sound captured by a digital microphone. The first acoustic signal includes buffered data transmitted with a first clock frequency. The digital microphone may provide voice activity detection. The example method also includes receiving at least one second acoustic signal representing the at least one sound captured by a second microphone, the at least one second acoustic signal including real-time data. The first and second acoustic signals are provided to an audio processing system which may include noise suppression and keyword detection. The buffered portion may be sent with a higher, second clock frequency to eliminate a delay of the first acoustic signal from the second acoustic signal. Providing the signals may also include delaying the second acoustic signal.