DMOS Diode Isolation via Floating N-Substrate Layer
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Solution Overview
Problem
Existing semiconductor devices face challenges in forming diodes on a substrate without parasitic current leakage to the P-type substrate, which affects current ability and requires expensive silicon on insulator (SOI) substrates or increases device thickness for high withstand voltage.
Innovation Solution
A semiconductor device is fabricated using a P-channel DMOS structure with a floating N-type buried layer and epitaxial layers, surrounded by diffusion regions and electrodes, which isolates the diode from the P-type substrate, allowing high withstand voltage without increasing device thickness.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If a PN diode is formed by forming an N-type semiconductor layer on a P-type substrate and forming a P-type region on the N-type semiconductor layer, then a diode structure is created, but a parasitic PNP structure is formed causing electric current to leak out to the P-type substrate
Solution Approach 1:
An N-type buried layer is introduced as an intermediary between the P-type substrate and the N-type semiconductor layer. This buried layer acts as a mediator that blocks the formation of the parasitic PNP structure, preventing current leakage to the substrate while allowing the diode to function normally.
Solution Approach 2:
The semiconductor structure is segmented into distinct layers: the P-type substrate is separated from the N-type semiconductor layer by the N-type buried layer. This segmentation breaks the continuous path that would otherwise form the parasitic PNP transistor, isolating the diode's current flow from the substrate.
2Reliability
If a silicon on insulator (SOI) substrate is used to prevent parasitic current leakage, then current ability is improved, but the substrate cost becomes extremely expensive
Solution Approach 1:
Instead of using expensive SOI substrates, the invention employs a standard P-type substrate combined with an N-type buried layer that is selectively formed only in the diode region. This approach achieves the same current leakage prevention as SOI but at a fraction of the cost by using conventional substrate materials and targeted layer formation.
Solution Approach 2:
The N-type buried layer is formed locally only in the regions where diodes are to be constructed, rather than using a global SOI structure. This localized approach provides the necessary isolation properties where needed while maintaining cost-effectiveness by not requiring expensive SOI substrates for the entire device area.
3Strength
If the thickness of the device is increased to achieve high withstand voltage, then voltage resistance is improved, but device complexity and manufacturing difficulty increase
Solution Approach 1:
The invention achieves high withstand voltage by optimizing the electrical parameters of the layered structure, specifically the doping concentrations and depths of the N-type buried layer and P-type region, rather than simply increasing the physical thickness. This allows high voltage capability to be achieved through parameter optimization rather than dimensional scaling.
Solution Approach 2:
Instead of solving the withstand voltage problem in the vertical dimension by increasing thickness, the invention addresses it through the horizontal dimension by optimizing the lateral extent and doping profiles of the buried layer and diffusion regions. This dimensional shift allows voltage resistance to be achieved without proportionally increasing device thickness.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances current ability per area while suppressing parasitic current leakage and avoids the cost of SOI substrates, achieving high withstand voltage by adjusting horizontal parameters rather than vertical thickness.
Implementation Method 1
an N-type buried layer is formed on the P-type substrate, P-type regions are formed on the N-type buried layer to isolate the P-type regions from the P-type substrate with the N-type buried layer
Data Source
AI summary
A semiconductor device includes a diode formed by making use of a DMOS transistor structure. In addition to such a DMOS transistor structure, the semiconductor device includes a second buried layer of the first conductivity type being provided on a first buried layer of a second conductivity type that is in a floating state. Moreover, the second buried layer of the first conductivity type and a second diffusion region of the first conductive type are connected by a first diffusion region of the first conductivity type. A first electrode is set as anode, and a second electrode and a third electrode are short-circuited and set as cathode.