DMOS Device Floating Region for ESD Mitigation
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Solution Overview
Problem
Prior art DMOS devices have limited capability to sustain electrostatic discharge (ESD) due to breakdown at the end of the device in the vertical direction, restricting their application range.
Innovation Solution
A DMOS device design that includes a floating region electrically isolated from the source and gate, allowing for full channel turn-on during high voltage ESD, reducing the risk of damage and enhancing ESD handling capabilities.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional DMOS device structure is used, then the device can operate in standard conditions, but the device breaks down at high electrostatic voltage due to insufficient ESD sustainment capability
Solution Approach 1:
The device is segmented into multiple functional regions including a drift region, a first doped region, and a second doped region. This segmentation allows each region to handle specific aspects of voltage and current, distributing the stress during ESD events and preventing catastrophic breakdown at any single point.
Solution Approach 2:
Different regions of the device are doped with different concentrations and types of dopants. The drift region has a first doping concentration, while the first and second doped regions have different doping concentrations. This local quality variation optimizes the electric field distribution, allowing the device to sustain higher voltages without breakdown.
2Reliability
If the device structure is modified to improve ESD capability, then the trigger voltage decreases and ESD mitigation improves, but the device complexity increases
Solution Approach 1:
The first doped region and second doped region are merged in function to collectively form the lateral channel with the drift region. This merging allows the device to achieve improved ESD capability through a relatively simple structural extension rather than adding entirely new components or systems.
Solution Approach 2:
The device structure extends in the vertical dimension with the first doped region positioned at a first depth and the second doped region at a second depth. This vertical dimensionality allows for optimized current flow paths and electric field distribution without significantly increasing lateral complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The DMOS device exhibits improved ESD mitigation, with a lower trigger voltage and higher breakdown voltage, enabling it to sustain higher electrostatic voltages and currents compared to prior art devices.
Implementation Method 1
a first conductive type floating region, which is formed in the body region below the upper surface, wherein the floating region is electrically floating and electrically isolated from the source and the gate
Data Source
AI summary
The present invention discloses a double diffused metal oxide semiconductor (DMOS) device and a manufacturing method thereof. The DMOS device includes: a first conductive type substrate, a second conductive type high voltage well, a gate, a first conductive type body region, a second conductive type source, a second conductive type drain, a first conductive type body electrode, and a first conductive type floating region. The floating region is formed in the body region, which is electrically floating and is electrically isolated from the source and the gate, such that the electrostatic discharge (ESD) effect is mitigated.