DMOS Active Region Contact Trench Schottky Diode

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Solution Overview

Problem

Power MOS devices face limitations in reducing on-resistance and gate capacitance, which affect the efficiency and reliability of power switches in applications like DC-DC converters, due to manufacturing constraints and the punch-through phenomenon.

Innovation Solution

The development of a DMOS device fabrication process that includes shallower source and body regions, increased cell density, and the use of anti-punch through implants and Schottky diodes to reduce on-resistance and gate capacitance, while maintaining good breakdown characteristics and reducing switching losses.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Force

If the channel length is reduced to lower on-resistance, then on-resistance decreases, but the device becomes susceptible to punch-through phenomenon

Engineering Contradiction:
Improveon-resistanceVSAvoidbreakdown characteristics
Core Design Contradiction:
ForceVSReliability

Solution Approach 1:

The device is divided into multiple cells arranged in parallel, with each cell having its own isolation trenches. This segmentation allows independent control of each cell's electrical characteristics while maintaining overall low on-resistance through the parallel configuration

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

An intermediate layer is introduced between the drain and body regions to prevent direct electrical interaction. This intermediate structure acts as a mediator that blocks punch-through while allowing controlled current flow through the channel

Inventive Principle:
Principle #24Intermediary (Mediator)

2Force

If the number of cells per unit area is increased to reduce on-resistance, then on-resistance decreases, but manufacturing complexity increases

Engineering Contradiction:
Improveon-resistanceVSAvoidmanufacturing technology
Core Design Contradiction:
ForceVSEase of manufacture

Solution Approach 1:

The device structure is segmented into identical, repeating cell units that can be manufactured using standardized processes. Each cell is isolated by trenches, allowing modular fabrication that simplifies manufacturing while enabling high cell density through systematic repetition

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The cell pitch and dimensions are optimized to achieve the desired cell density while remaining compatible with existing manufacturing capabilities. By carefully selecting geometric parameters, the device achieves low on-resistance without exceeding fabrication process limits

Inventive Principle:
Principle #35Parameter changes

3Force

If the channel length and cell density are increased to reduce on-resistance, then on-resistance decreases, but gate capacitance increases

Engineering Contradiction:
Improveon-resistanceVSAvoidgate capacitance
Core Design Contradiction:
ForceVSUse of energy by moving object

Solution Approach 1:

The gate is divided into multiple independent gate structures, each controlling a separate cell. This segmentation distributes the total gate capacitance across multiple smaller capacitive elements, reducing the overall charging requirements while maintaining the low on-resistance benefits of high cell density

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The device transitions from a planar configuration to a three-dimensional structure with vertical channels and stacked regions. This dimensional change increases the effective channel area without proportionally increasing the gate perimeter, thereby reducing gate capacitance while maintaining low on-resistance

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enhances the performance and reliability of power switches by lowering on-resistance and gate capacitance, improving power consumption and efficiency in power MOS devices.

Implementation Method 1

a Schottky diode is formed in the active region contact trench

Methodology Applied
Scientific EffectSchottky barrier:

Data Source

PatentUS8093651B2MOS device with integrated schottky diode in active region contact trench
Publication Date: 2012.01.10 ALPHA & OMEGA SEMICONDUCTOR LTD
  • US8093651B2 patent drawing
  • US8093651B2 patent drawing
  • US8093651B2 patent drawing

AI summary

A semiconductor device is formed on a semiconductor substrate. The device comprises a drain, an epitaxial layer overlaying the drain, and an active region. The active region comprises a body disposed in the epitaxial layer, having a body top surface and a body bottom surface, a source embedded in the body, extending from the body top surface into the body, a gate trench extending into the epitaxial layer, a gate disposed in the gate trench, an active region contact trench extending through the source and at least part of the body into the drain, wherein the active region contact trench is shallower than the body bottom surface, and an active region contact electrode disposed within the active region contact trench.