DNN Delta Prediction for Memory Page Scheduling

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Solution Overview

Problem

Existing memory access prediction methods, particularly those using deep neural networks (DNNs), face challenges in accurately predicting memory access counts and addresses due to resource intensity and cumulative error issues, making real-time implementation difficult and inefficient.

Innovation Solution

The use of next-delta and far-delta prediction techniques combined with a DNN classifier to convert memory access sequences into delta values, which are then classified and used to preload memory addresses into faster memory systems, reducing latency and energy consumption by improving prediction accuracy and reducing hardware requirements.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If deep neural networks are used for memory access prediction, then prediction capability is improved, but resource consumption and complexity increase

Engineering Contradiction:
Improveprediction accuracyVSAvoidhardware requirements
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent segments the memory prediction task into two distinct components: a DNN-based page access count predictor and a separate address prediction mechanism. This segmentation allows each component to be optimized independently, reducing overall system complexity while maintaining high prediction accuracy.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces an intermediary mechanism that translates DNN output (page access counts) into actionable address predictions. This intermediary layer bridges the gap between the complex DNN model and the simple address prediction requirement, enabling accurate predictions without directly implementing complex DNN architecture for address prediction.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Measurement precision

If direct access count prediction is performed, then comprehensive memory behavior is captured, but cumulative errors increase and retraining is frequently required

Engineering Contradiction:
Improveaccess count prediction accuracyVSAvoidprediction stability
Core Design Contradiction:
Measurement precisionVSReliability

Solution Approach 1:

The patent extracts the access count prediction function from the address prediction function. By using the DNN solely for predicting page access counts and separating this from address prediction, the system eliminates cumulative errors that would occur if both functions were combined in a single predictive model.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent implements a feedback mechanism where the DNN continuously learns from actual memory access patterns. The system monitors real memory access behavior and uses this feedback to refine predictions, reducing the need for frequent retraining while maintaining high accuracy and stability.

Inventive Principle:
Principle #23Feedback

3Loss of time

If memory preloading is performed based on accurate predictions, then latency is reduced, but energy consumption increases

Engineering Contradiction:
Improvememory access latencyVSAvoidenergy consumption
Core Design Contradiction:
Loss of timeVSUse of energy by moving object

Solution Approach 1:

The patent applies partial action by selectively preloading only those memory pages that the DNN predicts will be accessed, rather than preloading all possible pages. This selective approach reduces unnecessary energy consumption while still achieving latency reduction for the predicted access patterns.

Inventive Principle:
Principle #16Partial or excessive action

Solution Approach 2:

The patent changes the parameter being predicted from direct address prediction to page access count prediction. This parameter change enables more efficient memory management decisions, allowing the system to optimize the balance between latency reduction and energy consumption by adjusting preload strategies based on predicted access frequencies.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS12450160B2Delta predictions for page scheduling
Publication Date: 2025.10.21 MICRON TECHNOLOGY INC
  • US12450160B2 patent drawing
  • US12450160B2 patent drawing
  • US12450160B2 patent drawing

AI summary

Disclosed in some examples are improved address prediction and memory preloading that leverages next-delta prediction and/or far-delta prediction for scheduling using a DNN. Previous memory access sequence data that identify one or more memory addresses previously accessed by one or more processors of a system may be processed and then converted into a sequence of delta values. The sequence of delta values are then mapped to one or more classes that are then input to a DNN. The DNN then outputs a predicted future class identifier sequence that represents addresses that the DNN predicts will be accessed by the processor in the future. The predicted future class identifier sequence is then converted back to a predicted delta value sequence and back into a set of one or more predicted addresses.