DNPC PFC Modulation for Neutral-Point Voltage Stability
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Solution Overview
Problem
The bridgeless diode neutral point clamped (DNPC) three-level topology in power conversion systems experiences significant voltage fluctuations at the neutral point during modulation, requiring large capacitance to absorb grid-frequency fluctuations, which increases costs and complexity.
Innovation Solution
A quasi-two-level modulation strategy is implemented, where the working mode of the PFC circuit switches between specific modes (e.g., +2 mode and +0 mode, −2 mode and −0 mode) for shorter durations, reducing the current flowing through the neutral point and thereby minimizing voltage fluctuations, and using a controller to manage the switching sequence of the DNPC bridge arm switches.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If the bridgeless DNPC three-level topology is used with conventional modulation, then the power conversion efficiency is improved and component count is reduced, but the voltage fluctuation at the neutral point increases significantly
Solution Approach 1:
The patent implements a switching strategy where the PFC circuit alternates between different working modes (+2/+0 modes during positive half cycle, −2/−0 modes during negative half cycle) in a periodic manner. This periodic switching reduces the current flowing through the neutral point capacitor, thereby minimizing voltage fluctuations while maintaining the efficiency benefits of the bridgeless DNPC topology
Solution Approach 2:
The patent dynamically switches between different operating modes based on the modulation wave half cycle. The controller adjusts the working mode in real-time, transitioning between +2, +0 modes during positive half cycles and −2, −0 modes during negative half cycles. This dynamic adaptation allows the system to maintain low conduction losses while controlling neutral point voltage fluctuation
2Stability of the object's composition
If large capacitance is used to absorb grid-frequency fluctuations at the neutral point, then the voltage stability is improved, but the device cost and complexity increase
Solution Approach 1:
By implementing periodic switching between working modes that alternate current flow direction through the neutral point capacitor, the patent reduces the net charge accumulation. This allows the use of smaller capacitance values while maintaining voltage stability, directly addressing the contradiction between stability and complexity
Solution Approach 2:
The controller monitors the modulation wave and automatically adjusts the switching mode based on the half cycle detection. This feedback mechanism ensures that the PFC circuit operates in the optimal mode to minimize neutral point voltage fluctuation, allowing for reduced capacitor size while maintaining stability
Data Source
AI summary
The application provides a method for controlling a PFC circuit including a diode bridge arm, DNPC bridge arm and capacitor group connected in parallel. The control method includes: switching working mode of the PFC circuit back and forth between first mode and third mode via second mode in each switching cycle when positive half cycle of a modulation wave is modulated, and switching working mode of the PFC circuit back and forth between sixth mode and fourth mode via fifth mode in each switching cycle when negative half cycle of the modulation wave is modulated. The durations of the second and fifth modes are as short as possible, thereby decreasing a current flowing into or out from midpoint of the capacitor group, and reducing voltage fluctuation at the midpoint. The application further provides a PFC circuit using the control method and a power conversion device having the PFC circuit.