Multi-Chip Doherty Amplifier Layout for Phase Difference Suppression

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Solution Overview

Problem

Manufacturing variations in semiconductor chips, such as parasitic capacitance and MIM capacitance, cause phase differences between the main and peak transistor paths in Doherty amplifiers, leading to reduced saturation output power.

Innovation Solution

The Doherty amplifier design integrates main and peak transistors on separate semiconductor chips, with matching circuits also distributed across these chips, ensuring similar variations and minimizing phase differences between signal paths.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If main transistors and peak transistors are integrated on the same semiconductor chip, then device complexity is reduced and manufacturing is simplified, but manufacturing variation causes excessive phase difference between signal paths

Engineering Contradiction:
Improveintegration structureVSAvoidphase difference control
Core Design Contradiction:
Device complexityVSManufacturing precision

Solution Approach 1:

The invention divides the Doherty amplifier into two separate semiconductor chips: a first chip containing the main transistor and its associated matching circuit, and a second chip containing the peak transistor and its associated matching circuit. This segmentation allows independent control and optimization of each path, reducing the impact of manufacturing variations on phase difference while maintaining simplified integration benefits.

Inventive Principle:
Principle #1Segmentation

2Manufacturing precision

If separate semiconductor chips are used for main and peak transistors, then phase difference is reduced through separate manufacturing control, but device complexity and assembly difficulty increase

Engineering Contradiction:
Improvephase difference controlVSAvoidmulti-chip structure
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The invention combines related components into integrated units on each chip: the main transistor is combined with its matching circuit on the first chip, and the peak transistor is combined with its matching circuit on the second chip. This merging approach reduces the number of inter-chip connections and simplifies the overall assembly process while maintaining the benefits of separate manufacturing control for phase difference reduction.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS20250015763A1Doherty amplifier
Publication Date: 2025.01.09 MITSUBISHI ELECTRIC CORP
  • US20250015763A1 patent drawing
  • US20250015763A1 patent drawing
  • US20250015763A1 patent drawing

AI summary

A Doherty amplifier according to the first disclosure includes an input terminal; an output terminal; a first main transistor provided in a first signal path connecting the input terminal and the output terminal; a second main transistor provided on the output terminal side of the first main transistor in the first signal path; a first peak transistor provided in a second signal path connecting the input terminal and the output terminal; and a second peak transistor provided on the output terminal side of the first peak transistor in the second signal path, wherein one of the first peak transistor and the second peak transistor, and the first main transistor are provided on a first semiconductor chip, and another of the first peak transistor and the second peak transistor, and the second main transistor are provided on a second semiconductor chip.