Monolithic Doherty Amplifier Shunt Inductor Integration
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Solution Overview
Problem
Conventional Doherty power amplifiers face performance issues due to placement tolerances, wirebond length and height variations, and structural variations in the signal combiner on printed circuit boards, leading to inconsistent RF performance.
Innovation Solution
Integrating main and peaking amplifiers, as well as the signal combiner within a single semiconductor die, with a high resistivity substrate and integrated shunt-inductance circuits, to achieve a monolithic Doherty amplifier with reduced wirebond length and height variations, and improved phase alignment.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If main and peaking amplifiers are implemented using discretely-packaged devices on a PCB substrate, then the amplifier can be assembled using conventional packaging methods, but placement tolerances and wirebond variations lead to inconsistent RF performance
Solution Approach 1:
The patent integrates the main amplifier and peaking amplifier onto a single semiconductor die, eliminating the need for separate discrete packaging and PCB assembly. This merging of components directly resolves the placement tolerance and wirebond variation issues by making all components co-located on the same substrate, thereby achieving consistent RF performance without sacrificing manufacturing capability.
2Manufacturing precision
If signal combiner is implemented on a printed circuit board, then the combiner structure can be easily fabricated, but structural variations in the combiner lead to inconsistent RF performance
Solution Approach 1:
The signal combiner is integrated onto the same semiconductor die as the amplifiers, creating a monolithic structure where all components are fabricated using the same semiconductor manufacturing process. This eliminates the structural variations that occur with separate PCB implementation while maintaining ease of manufacture through standard semiconductor fabrication techniques.
3Reliability
If wirebond length and height variations are present in discrete amplifier packaging, then conventional packaging can be used, but phase alignment between amplifier paths deteriorates
Solution Approach 1:
By integrating all amplifier components on a single die, the patent eliminates wirebonds entirely, replacing them with on-chip interconnects. This ensures identical electrical path lengths and impedances for all signal paths, guaranteeing consistent phase alignment without the variations inherent in discrete wirebond packaging.
4Manufacturing precision
If amplifiers are integrated within a single semiconductor die, then placement tolerance and wirebond variations are eliminated, but the integration complexity and manufacturing process difficulty increase
Solution Approach 1:
The patent leverages standard semiconductor manufacturing processes to integrate multiple amplifier functions on a single die. By using established CMOS or bipolar fabrication techniques, the integration is achieved without requiring exotic or overly complex manufacturing steps, thus balancing the improvement in placement consistency with acceptable manufacturing complexity.
Data Source
AI summary
A multiple-path (e.g., Doherty) amplifier includes a semiconductor die, a radio frequency (RF) signal input terminal, a combining node structure integrally formed with the semiconductor die, first and second amplifiers (e.g., main and peaking amplifiers, or vice versa) integrally formed with the semiconductor die, and a shunt circuit electrically connected between an output of the first amplifier and a ground reference node. Inputs of the first and second amplifier are electrically coupled to the RF signal input terminal, and outputs of the first and second amplifier are electrically coupled to the combining node structure. The shunt circuit includes a shunt inductance and a shunt capacitance coupled in series between the output of the first amplifier and the ground reference node, and the shunt capacitance has a first terminal coupled to the shunt inductance, and a second terminal coupled to the ground reference node.


