Doherty Amplifier FET Conductance Tuning for Backoff Efficiency

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Solution Overview

Problem

Doherty amplifiers face challenges in improving efficiency and reducing distortion, particularly in high-frequency signal amplification using semiconductor devices.

Innovation Solution

The semiconductor device for a Doherty amplifier incorporates a main amplifier and a peak amplifier with field effect transistors having nitride semiconductor layers, where the drain conductance of the main amplifier is designed to be larger than that of the peak amplifier by varying buffer layer thickness, carbon concentration, and gate electrode configurations, ensuring balanced efficiency and distortion characteristics.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by moving object

If the drain conductance of the main amplifier is increased to improve efficiency, then efficiency is improved, but distortion increases

Engineering Contradiction:
ImproveefficiencyVSAvoiddistortion
Core Design Contradiction:
Use of energy by moving objectVSObject-generated harmful factors

Solution Approach 1:

The patent applies different buffer layer thicknesses to the main amplifier and peak amplifier. The main amplifier uses a first buffer layer with a first thickness, while the peak amplifier uses a second buffer layer with a second thickness different from the first. This local differentiation allows each amplifier to have optimized drain conductance characteristics, enabling the main amplifier to operate with higher efficiency while the peak amplifier compensates for distortion, thus resolving the contradiction between efficiency improvement and distortion control.

Inventive Principle:
Principle #3Local quality

2Reliability

If the buffer layer thickness is varied to optimize drain conductance, then performance characteristics are improved, but manufacturing complexity increases

Engineering Contradiction:
Improveperformance characteristicsVSAvoidmanufacturing complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent segments the buffer layer into distinct portions with different thicknesses - a first buffer layer under the main amplifier and a second buffer layer under the peak amplifier. This segmentation allows independent optimization of each amplifier's performance characteristics through controlled thickness variations, while maintaining a systematic manufacturing approach that manages complexity through structured design rather than ad-hoc adjustments.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS20260066851A1Semiconductor device and doherty amplifier
Publication Date: 2026.03.05 SUMITOMO ELECTRIC INDUSTRIES LTD
  • US20260066851A1 patent drawing
  • US20260066851A1 patent drawing
  • US20260066851A1 patent drawing

AI summary

A semiconductor device for a Doherty amplifier includes a main amplifier including a first field effect transistor, and includes a peak amplifier including a second field effect transistor. A first drain conductance of the first field effect transistor when applying a gate voltage obtained by adding a predetermined voltage to a pinch-off voltage and a predetermined drain voltage is larger than a second drain conductance of the second field effect transistor when applying both a gate voltage and the predetermined drain voltage, such that when measuring the first drain conductance, a drain current having a same value as a drain current flowing through the first field effect transistor flows through the second field effect transistor.