Doherty Amplifier Impedance Ratio Tuning for Flat Gain
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Solution Overview
Problem
The Doherty amplifier disclosed in Patent Literature 1 includes a delay circuit that causes a delay in outputting the amplified signal, leading to a decrease in gain during the period from backoff to saturation operation.
Innovation Solution
The Doherty amplifier is configured such that the ratio of the characteristic impedance of the second transmission line to the first transmission line determines the power division ratio between the carrier and peak amplifiers when both are saturated, and the resistance value of the resistor is set by multiplying the sum of the input impedances of the amplifiers at saturation by a proportionality coefficient greater than 0 but less than 1, eliminating the need for a delay circuit.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a delay circuit is used to wait for the control circuit to finish varying the division ratio, then the gain decrease during backoff to saturation operation is prevented, but the signal output is delayed and productivity is reduced
Solution Approach 1:
The patent removes the delay circuit from the system entirely. Instead of delaying the input signal to wait for control circuit completion, the system directly outputs the amplified signal as soon as amplification is complete, eliminating unnecessary time delay while maintaining gain stability through the detection and control circuits.
Solution Approach 2:
The detection circuit continuously monitors the input signal power level in advance and the control circuit proactively adjusts the division ratio before the amplification process completes. This preliminary action ensures that by the time the signal passes through the amplifiers, the optimal division ratio is already established, preventing gain decrease without requiring post-processing delay.
2Reliability
If the resistance value of the variable resistor is set to the sum of input impedances at saturation, then the amplifiers saturate simultaneously, but the gain decreases during backoff to saturation operation
Solution Approach 1:
The patent employs a variable resistor whose resistance value dynamically changes based on the input signal power level. During backoff operation, the resistance is adjusted to an optimal value that maintains high gain, and during saturation operation, it transitions to the sum of input impedances for simultaneous saturation. This dynamic adjustment resolves the contradiction between maintaining gain and achieving simultaneous saturation.
Solution Approach 2:
The system changes the resistance parameter of the variable resistor according to operating conditions. By detecting the input power level and adjusting the resistance value accordingly, the system optimizes both gain during backoff and simultaneous saturation during peak operation, preventing the gain decrease that would occur with a fixed resistance value.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration prevents a decrease in gain of the combined signal during the backoff to saturation operation without a delay circuit, allowing simultaneous saturation of both amplifiers and maintaining flat gain characteristics.
Implementation Method 1
the ratio of the characteristic impedance of the second transmission line to the characteristic impedance of the first transmission line is a power division ratio of the signal to be amplified between the carrier amplifier and the peak amplifier
Implementation Method 2
a resistance value of the resistor is a value obtained by multiplying, by a proportionality coefficient that is greater than 0 but less than 1, a sum of the input impedance of the carrier amplifier when the carrier amplifier reaches saturation and the input impedance of the peak amplifier when the peak amplifier reaches saturation
Data Source
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AI summary
A Doherty amplifier (10) is configured in such a manner that: the ratio Z3/Z2 of a characteristic impedance Z3 of a second transmission line (13) to a characteristic impedance Z2 of a first transmission line (12) is a power division ratio P2/P3 of a signal to be amplified between a carrier amplifier (18) and a peak amplifier (19) when both of the carrier amplifier (18) and the peak amplifier (19) are saturated; and a resistance value Riso of a resistor (14) is a value obtained by multiplying, by a proportionality coefficient w which is equal to or greater than 0 but less than 1, the sum of the input impedance Zcin0 of the carrier amplifier (18) when the carrier amplifier (18) reaches saturation and the input impedance Zpin0 of the peak amplifier (19) when the peak amplifier (19) reaches saturation.