Doherty Amplifier LC Harmonic Loading at the Combining Node

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Solution Overview

Problem

Doherty amplifiers using high-power, high-density III-V FETs like GaN transistors face inadequate harmonic termination due to reduced drain-source capacitance, leading to degraded efficiency and power output compared to LDMOS-based implementations.

Innovation Solution

Incorporating a series inductor-capacitor (LC) harmonic control circuit at the Doherty amplifier's combining node to effectively terminate carrier second and third-order harmonics, ensuring adequate harmonic termination and improved RF performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Volume of moving object

If high-power, high-density III-V FETs are used to reduce amplifier size, then device miniaturization is achieved, but drain-source capacitance decreases leading to inadequate harmonic termination

Engineering Contradiction:
Improveamplifier sizeVSAvoidharmonic termination
Core Design Contradiction:
Volume of moving objectVSReliability

Solution Approach 1:

An LC harmonic control circuit is introduced as an intermediary component between the III-V FET amplifier and the load. This circuit compensates for the insufficient harmonic termination capability of the low-capacitance transistor by providing the necessary reactive impedance, thereby restoring proper harmonic loading without requiring larger devices

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent modifies the electrical parameters at the amplifier output by introducing adjustable inductance and capacitance values in the LC circuit. By tuning these parameters, the harmonic termination impedance can be optimized to match the requirements of the III-V FET, compensating for the device's inherently low drain-source capacitance

Inventive Principle:
Principle #35Parameter changes

2Productivity

If drain-source capacitance is reduced in high-density transistors, then device integration density increases, but power-added efficiency deteriorates due to poor harmonic termination

Engineering Contradiction:
Improvedevice integration densityVSAvoidpower-added efficiency
Core Design Contradiction:
ProductivityVSUse of energy by moving object

Solution Approach 1:

The LC harmonic control circuit serves as a mediator that decouples the relationship between transistor density and harmonic termination quality. High-density transistors can be used for integration while the LC circuit ensures proper harmonic loading, thereby maintaining power-added efficiency despite reduced inherent capacitance

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The LC circuit is designed to preemptively counteract the harmful effect of insufficient harmonic termination before it can degrade efficiency. By providing the necessary reactive impedance in advance, the circuit prevents efficiency loss rather than attempting to correct it after the fact

Inventive Principle:
Principle #9Preliminary anti-action

3Device complexity

If carrier harmonic termination is inadequate, then circuit complexity is reduced, but output power and efficiency are degraded

Engineering Contradiction:
Improvecircuit complexityVSAvoidoutput power
Core Design Contradiction:
Device complexityVSPower

Solution Approach 1:

A relatively simple LC harmonic control circuit is introduced as an intermediary component that provides the necessary harmonic termination function. This modest addition to circuit complexity sufficiently restores output power and efficiency by ensuring proper harmonic loading of the III-V FET amplifier

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The LC harmonic control circuit enhances harmonic termination, maintaining high power-added efficiency and output power in Doherty amplifiers using III-V FETs, comparable to LDMOS-based systems, while enabling miniaturization and meeting performance criteria.

Implementation Method 1

Incorporating a series inductor-capacitor (LC) harmonic control circuit at the Doherty amplifier's combining node to effectively terminate carrier second and third-order harmonics

Methodology Applied
Scientific EffectResonance: Resonance

Data Source

PatentUS12088255B2Doherty amplifiers and amplifier modules with shunt inductor and capacitor circuit for improved carrier harmonic loading
Publication Date: 2024.09.10 NXP USA INC
  • US12088255B2 patent drawing
  • US12088255B2 patent drawing
  • US12088255B2 patent drawing

AI summary

A Doherty amplifier includes a peaking amplifier, a carrier amplifier, and a combining node electrically connected to the carrier amplifier and the peaking amplifier. The Doherty amplifier includes a harmonic control circuit coupled to the combining node. The harmonic control circuit includes an inductor and a capacitor and the inductor and capacitor are connected in series between the first current conducting terminal and a ground reference node. An inductance value of the inductor of the harmonic control circuit and a capacitance value of the capacitor of the harmonic control circuit are selected to terminate second order harmonic components of a fundamental frequency of a signal generated by the carrier amplifier.