Doherty Amplifier Linearization for Capacitance Loading
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Solution Overview
Problem
Doherty power amplifiers face significant distortion challenges due to dynamic operating conditions such as temperature, supply voltage, and load voltage standing wave ratio, which are difficult to correct with digital pre-distortion alone, especially concerning base-to-collector capacitance loading, requiring complex calibration systems and large memory tables for DPD coefficients.
Innovation Solution
A hybrid Doherty amplifier system employing both digital and analog pre-distortion (DPD-APD) linearization, where analog pre-distortion circuitry compensates for base-to-collector capacitance loading and dynamic variations using temperature, supply voltage, and load sensors, reducing the need for complex calibration systems and memory storage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If digital pre-distortion control is used to linearize power amplifiers, then linearity performance is improved, but system complexity and calibration complexity increase
Solution Approach 1:
The patent segments the pre-distortion function into two parts: a lookup table-based digital pre-distortion for static nonlinearities and an analog neural network for dynamic nonlinearities. This segmentation allows each component to handle specific aspects of linearization, reducing the overall complexity compared to a pure digital approach that would require large lookup tables and complex calibration.
Solution Approach 2:
The patent introduces an analog neural network as an intermediary component between the digital pre-distortion and the power amplifier. This analog intermediary processes dynamic nonlinearities in the analog domain, avoiding the need for complex digital processing and large memory tables, thus reducing system complexity while maintaining linearity performance.
2Reliability
If digital pre-distortion control is used to linearize power amplifiers, then linearity performance is improved, but calibration system complexity increases
Solution Approach 1:
The calibration process is segmented into two independent parts: calibration of the digital lookup table for static nonlinearities and calibration of the analog neural network for dynamic nonlinearities. This segmentation simplifies the overall calibration system compared to calibrating a single complex digital pre-distortion system, as each component can be calibrated separately using simpler procedures.
Solution Approach 2:
The analog neural network is designed to adapt to dynamic operating conditions automatically during operation, reducing the need for complex real-time calibration systems. The network's inherent adaptability allows it to self-adjust to changing conditions, simplifying the calibration infrastructure required.
3Reliability
If analog pre-distortion is used to compensate for base-to-collector capacitance loading, then linearity is improved, but device complexity increases
Solution Approach 1:
The patent introduces an analog neural network as an intermediary that specifically targets base-to-collector capacitance loading effects. This dedicated analog component handles the specific nonlinearity without requiring complex modifications to the entire power amplifier system, thus improving linearity with minimal increase in overall device complexity.
Solution Approach 2:
The analog pre-distortion is applied locally at the baseband stage where base-to-collector capacitance effects are most prominent, rather than attempting to correct all nonlinearities throughout the entire signal path. This localized approach improves linearity for the specific problem area without unnecessarily increasing complexity across the entire device.
Data Source
AI summary
A Doherty amplifier system is disclosed. The Doherty amplifier system includes a carrier amplifier having a carrier input and a carrier output, and a peaking amplifier having a peaking input coupled to the carrier input and a peaking output coupled to the carrier output. Analog pre-distortion circuitry is configured to linearize the carrier amplifier and linearize the peaking amplifier by compensating for base-to-collector capacitance loading of the carrier amplifier and the peaking amplifier during operation.