Doherty Amplifier Load Modulation for Low-Power Carrier Saturation

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Solution Overview

Problem

Doherty amplifiers experience performance degradation at low power regions due to unsuitable load modulation and insufficient saturation operation of the carrier amplifier, particularly with high Peak to Average Power Ratio (PAPR) in mobile communication systems, leading to reduced average performance.

Innovation Solution

The apparatus includes a power divider, a carrier amplifier, at least one peaking amplifier, offset lines, and a Doherty circuit that generates a load impedance greater than twice the load impedance at maximum output power for the carrier amplifier when the peaking amplifier does not operate, ensuring sufficient saturation and improved load modulation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Power

If a conventional Doherty amplifier uses a quarter-wave transformer line for load modulation, then high power output is achieved, but performance degrades at low power regions due to unsuitable load modulation

Engineering Contradiction:
Improveoutput powerVSAvoidperformance at low power region
Core Design Contradiction:
PowerVSReliability

Solution Approach 1:

The patent changes the load impedance parameter seen by the carrier amplifier from the conventional 2Ropt to a higher value (3Ropt or more) when the peaking amplifier is off. This parameter change enables the carrier amplifier to operate in saturation mode at low power regions, improving performance by approximately 4% compared to conventional designs.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent implements dynamic load modulation by using switching elements (such as PIN diodes or transistors) to change the impedance transformation ratio of the quarter-wave transformer line based on the operating state. When the peaking amplifier is off, the switching element connects additional impedance elements to achieve a higher effective load impedance (greater than 2Ropt), enabling saturation operation of the carrier amplifier at low power regions.

Inventive Principle:
Principle #15Dynamics

2Device complexity

If the peaking amplifier is designed with low bias for miniaturization and cost reduction, then device size and cost decrease, but the amplifier fails to provide maximum output at low power regions

Engineering Contradiction:
Improvedevice size and costVSAvoidmaximum output at low power region
Core Design Contradiction:
Device complexityVSPower

Solution Approach 1:

The patent changes the load impedance parameter seen by the carrier amplifier to a higher value (3Ropt or more) when the peaking amplifier is off, enabling the carrier amplifier to operate in saturation mode and provide maximum output even when the peaking amplifier has low bias and cannot operate at low power regions.

Inventive Principle:
Principle #35Parameter changes

3Device complexity

If the carrier amplifier operates without sufficient saturation at low power regions, then device simplicity is maintained, but average performance decreases due to high PAPR in mobile communication systems

Engineering Contradiction:
Improvedevice simplicityVSAvoidaverage performance
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The patent changes the load impedance parameter to enable saturation operation of the carrier amplifier at low power regions. By increasing the load impedance seen by the carrier amplifier to 3Ropt or more when the peaking amplifier is off, the carrier amplifier can operate in saturation mode, improving average performance by approximately 4% while maintaining device simplicity.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS8188789B2Apparatus for improving performance at low power region in a Doherty amplifier
Publication Date: 2012.05.29 SAMSUNG ELECTRONICS CO LTD
  • US8188789B2 patent drawing
  • US8188789B2 patent drawing
  • US8188789B2 patent drawing

AI summary

A method and apparatus improve the performance of a carrier amplifier in a Doherty amplifier. The Doherty amplifier includes a power divider, a carrier amplifier, at least one peaking amplifier, offset lines, and a Doherty circuit. The power divider provides a power signal to each of the carrier amplifier and the at least one peaking amplifier. The carrier amplifier amplifies power of a signal inputted from the power divider. The at least one peaking amplifier amplifies power of a signal inputted from the power divider. The offset lines control a load impedance when the at least one peaking amplifier does not operate. When the at least one peaking amplifier does not operate, the Doherty circuit generates the load impedance of the carrier amplifier that is larger than twice a load impedance at the maximum output power of the carrier amplifier.