Doherty Amplifier Combining Load Matching for Gain-Efficiency Balance
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Solution Overview
Problem
Conventional Doherty power amplifiers face challenges in achieving balanced performance between symmetric and asymmetric configurations, with symmetric amplifiers offering better gain and RF bandwidth but poorer efficiency, while asymmetric amplifiers have better back-off efficiency but poorer linearity and gain.
Innovation Solution
The design incorporates symmetric or slightly asymmetric carrier and peaking power amplifier devices coupled with a complex combining load matching circuit, which reduces parasitic effects and simplifies impedance matching, enabling higher gain and more linearizable power added efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If a symmetric Doherty amplifier configuration is used, then gain and RF bandwidth are improved, but back-off efficiency deteriorates
Solution Approach 1:
The patent applies asymmetry by introducing a complex combining load with unequal resistance values (R1 and R2) instead of using equal resistances in a symmetric configuration. This asymmetric load distribution enables the amplifier to achieve better back-off efficiency while maintaining good gain and bandwidth characteristics, effectively resolving the contradiction between symmetric configuration benefits and efficiency limitations.
2Use of energy by moving object
If an asymmetric Doherty amplifier configuration is used, then back-off efficiency is improved, but linearity and gain deteriorate
Solution Approach 1:
The patent employs parameter changes by carefully selecting and optimizing the resistance values (R1 and R2) of the asymmetric load, along with adjusting impedance transformation ratios and component values in the matching networks. These parameter optimizations enable the asymmetric configuration to achieve improved back-off efficiency while maintaining acceptable linearity and gain performance.
3Object-affected harmful factors
If a complex combining load matching circuit is used, then parasitic effects are reduced and impedance matching is simplified, but device complexity increases
Solution Approach 1:
The patent merges the impedance matching function with the load modulation function by integrating the matching networks directly into the output circuits of the carrier and peaking amplifiers. This consolidation achieves parasitic effect reduction and impedance matching simplification while avoiding the need for separate, additional matching components, thereby limiting the increase in overall device complexity.
Data Source
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AI summary
A Doherty power amplifier includes input circuitry that provides input signals to carrier and peaking amplifiers with an input phase offset between 20 degrees and 160 degrees. Carrier and peaking amplifier output signals are combined at a combining node. A complex combining load matching circuit, which is connected to the combining node, consists of two, series-connected transmission line segments. The matching circuit provides a complex impedance, ZL, with a non-zero reactive portion, xn. The output circuit between the peaking amplifier and the combining node has an electrical length of 0 or n∗180 degrees (n = an integer value). The output circuit between the carrier amplifier and the combining node has an electrical length, θx, equal to an absolute value of the input phase offset when the electrical length of the peaking output circuit is 0 degrees.