Doherty Power Amplifier Linearity via Derivative Superposition
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Solution Overview
Problem
Current power amplifiers (PAs) face a trade-off between average-power efficiency and inherent linearity, particularly in modern wireless communication systems, where high peak-to-average power ratio (PAR) signals require efficient amplification while maintaining sufficient linearity to comply with regulations, especially in 5G digital MIMO systems where existing linearization techniques are costly and inefficient.
Innovation Solution
The proposed amplifier arrangement employs multiple main amplifier circuits with separately biased transistors and an auxiliary amplifier branch, utilizing the derivative superposition principle to optimize linearity and efficiency by combining output currents with positive and negative third-order nonlinearity coefficients, and Doherty load modulation to extend linearity from back-off to peak power levels.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If conventional power amplifiers are used to amplify high PAR signals, then peak power capability is maintained, but average-power efficiency deteriorates
Solution Approach 1:
The power amplifier is segmented into multiple parallel amplifier circuits, each with different transistor sizes and bias configurations. This segmentation allows each circuit to operate efficiently at different power levels, collectively achieving high peak power capability while maintaining good average-power efficiency through coordinated operation of the segmented units.
Solution Approach 2:
Different local regions (amplifier circuits) within the system are given different qualities through varying transistor sizes and bias settings. Some circuits are optimized for high-power operation while others handle low-power signals, allowing the overall system to maintain efficiency across the full power range from back-off to peak levels.
2Use of energy by moving object
If power amplifiers operate at high efficiency, then average-power efficiency is improved, but linearity deteriorates due to intrinsic nonlinearity of active devices
Solution Approach 1:
Multiple amplifier circuits with different nonlinearity characteristics are merged in parallel. The combined output of these circuits achieves improved linearity because the nonlinear distortion products from individual circuits cancel each other out when properly balanced, while the efficiency benefits of operating away from deep back-off are preserved.
Solution Approach 2:
The intrinsic nonlinearity of active devices, which is normally a harmful effect causing distortion, is converted into a beneficial property. By carefully designing circuits with complementary nonlinearities and combining them in parallel, the distortion products from each circuit cancel each other, transforming the harmful nonlinearity into improved linearity while maintaining high efficiency operation.
3Reliability
If multiple auxiliary branches with different biases are used, then inherent linearity is improved through derivative superposition, but device complexity increases
Solution Approach 1:
The amplifier is divided into a manageable number of parallel circuits (typically 2-4) rather than using a large number of branches. Each segment is carefully designed with specific transistor size ratios and bias settings to achieve the derivative superposition effect, balancing linearity improvement with acceptable device complexity.
Solution Approach 2:
Instead of adding many branches, the invention achieves linearity improvement by changing key parameters (transistor size ratios, bias currents, and impedance transformations) within a limited number of parallel circuits. This approach obtains the benefits of derivative superposition while avoiding the complexity of having too many amplifier branches.
Data Source
AI summary
An amplifier arrangement for amplifying an input signal to an output signal for delivering to a load is disclosed. The amplifier arrangement comprises a power splitter configured to receive the input signal and produce split input signals. The amplifier arrangement further comprises a first amplifier branch comprising multiple main amplifier circuits. Output signals of the multiple main amplifier circuits are combined to generate a first output signal. The amplifier arrangement further comprises a second amplifier branch comprising at least one auxiliary amplifier circuit. The at least one auxiliary amplifier circuit is configured to receive a split input signal from the power splitter and produce a second output signal. The amplifier arrangement further comprises a power combiner configured to receive the first and second output signals and produce the output signal for delivering to the load.


