Domain Clock Sequencing Circuit for Power Rail Voltage Droop
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Solution Overview
Problem
Integrated circuits (ICs) experience a voltage droop due to sudden power surges when logic circuits in a clock domain are reactivated, leading to performance slowdowns and potential logic errors.
Innovation Solution
The implementation of domain clock and power control circuits, including a sequencing circuit that controls a clock gate signal and a power regulator, which deactivates the clock gate signal after ensuring a voltage increase on the power rail, thereby reducing or avoiding voltage droop by managing power supply to the domain.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the clock gate signal is deactivated to activate logic circuits in a clock domain, then the domain can perform its function, but a sudden surge in power consumption causes a voltage droop on the power rail
Solution Approach 1:
The patent applies preliminary action by activating the power regulator circuit before deactivating the clock gate signal. The sequencing circuit generates a power activation signal that turns on the power regulator in advance, allowing the power rail voltage to stabilize before the logic circuits are activated. This prevents the voltage droop that would otherwise occur when the logic circuits suddenly draw power upon clock activation.
2Productivity
If logic circuits continue to consume power while not in use to maintain readiness, then activation is faster, but power consumption increases
Solution Approach 1:
The patent segments the power supply control into domain-specific regulator circuits that can be independently activated. Instead of maintaining power to entire logic circuits during standby, the system divides power control into discrete domain-level segments. Each domain has its own power regulator that can be activated only when needed, reducing standby power consumption while maintaining fast activation capability through the sequencing circuit.
3Use of energy by moving object
If multiple domains are controlled independently with separate clock and power management, then power efficiency improves, but device complexity increases
Solution Approach 1:
The patent implements universality through the sequencing circuit that handles multiple domains using the same basic control mechanism. The sequencing circuit generates power activation signals for multiple domains in a standardized manner, and each domain uses an identical power regulator circuit design. This multi-functional approach allows independent control of multiple domains while reusing the same control logic and circuit architecture, thereby managing complexity.
Data Source
AI summary
A domain control circuit includes a power regulator to supply power for a first domain on a power rail and a sequencing circuit to control the power regulator, and a clock gate signal to activate the domain. The sequencing circuit receives a domain control signal to control activation and deactivation of the domain. The domain control circuit deactivates the clock gate signal to the domain after controlling the power regulator to supply power for the domain on a power rail. In this manner, a voltage droop in a supply voltage on a power rail is reduced. In some examples, the clock gate signal to the domain is deactivated after a voltage increase on the power rail. In some examples, the power regulator includes a plurality of parallel regulator circuits and a regulator control circuit to determine a number of the parallel regulator circuits to be activated to power the domain.