Domain-Decomposition-Aware Processor Assignment for MPI Communication

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Solution Overview

Problem

Existing MPI process placement mechanisms are static, version-specific, and limited to 2D and 3D grid topologies, failing to optimize communications in heterogeneous compute node configurations and not supporting multiple program multiple data (MPMD) programming paradigms, leading to inefficient interconnect infrastructure scaling and suboptimal system utilization.

Innovation Solution

A system and method for domain decomposition aware processor assignment that dynamically assigns tasks to computing nodes based on network distance, bandwidth, and proximity, utilizing workload managers and simulations to minimize inter-node communications, and supports heterogeneous systems and MPMD programming.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If the number of processor cores per processor is increased to boost computing power, then computing cost is reduced and processing capability is improved, but interconnect infrastructure size and cost increase exponentially

Engineering Contradiction:
Improvecomputing powerVSAvoidinterconnect infrastructure size
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent implements dynamic process placement that adapts to changing workload patterns and system states. The workload manager continuously monitors communication patterns and repositions MPI processes to optimize interconnect utilization, transforming the static interconnect infrastructure into a dynamically optimized system that scales efficiently with processor core count increases.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system changes the parameter of process placement configuration from static to dynamic, using workload-dependent placement strategies. By adjusting process placement parameters based on observed communication patterns, the system optimizes interconnect bandwidth utilization and reduces the effective infrastructure requirements for scaling processor cores.

Inventive Principle:
Principle #35Parameter changes

2Speed

If Multi-rail interconnect ports are used to scale communications between processors, then interconnect bandwidth is increased, but interconnect infrastructure size and cost are doubled, tripled, or quadrupled

Engineering Contradiction:
Improveinterconnect bandwidthVSAvoidinterconnect infrastructure size
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The patent segments the communication workload by dynamically assigning different MPI processes to different compute nodes based on communication patterns. This segmentation allows existing interconnect infrastructure to be utilized more efficiently across multiple nodes, achieving scaled bandwidth without proportionally increasing infrastructure size.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system introduces a new dimension of optimization by considering spatial locality of reference in process placement. By organizing processes in 2D and 3D grid topologies across compute nodes, the system achieves efficient bandwidth utilization through dimensional organization rather than simply adding more interconnect rails.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Ease of operation

If existing MPI process placement mechanisms are used, then process placement is simplified, but communication optimization is limited to 2D and 3D grid topologies and does not support heterogeneous systems or MPMD programming

Engineering Contradiction:
Improveprocess placement simplicityVSAvoidsupport for heterogeneous systems and programming paradigms
Core Design Contradiction:
Ease of operationVSAdaptability or versatility

Solution Approach 1:

The patent creates a universal process placement mechanism that handles multiple programming paradigms (MPMD, traditional MPI) and heterogeneous system configurations through a single workload manager interface. The system provides multi-functional placement strategies that adapt to different application types and system architectures without requiring separate mechanisms.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The system implements dynamic placement policies that adapt to heterogeneous compute node configurations and different programming paradigms. Rather than using static, topology-specific placement, the workload manager continuously adjusts process placement based on observed communication patterns, supporting both MPMD and traditional MPI applications across heterogeneous systems.

Inventive Principle:
Principle #15Dynamics

4Device complexity

If static process placement mechanisms are used, then implementation is simpler, but system utilization optimization is hampered and interconnect efficiency is reduced

Engineering Contradiction:
Improveplacement mechanism complexityVSAvoidsystem utilization efficiency
Core Design Contradiction:
Device complexityVSProductivity

Solution Approach 1:

The patent implements feedback-driven process placement where the workload manager monitors interconnect communication patterns and uses this feedback to dynamically adjust process placement. This closed-loop system continuously optimizes system utilization by adapting process positions based on observed communication behavior, significantly improving interconnect efficiency compared to static placement.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The system enables self-optimizing process placement where the workload manager automatically adjusts process positions based on observed communication patterns without requiring manual intervention. The system serves itself by using its own performance data to drive placement optimizations, improving utilization efficiency while maintaining manageable complexity.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS20250278300A1System, method and computer-accessible medium for a domain decomposition aware processor assignment in multicore processing system(s)
Publication Date: 2025.09.04 NEW YORK UNIV IN ABU DHABI CORP
  • US20250278300A1 patent drawing
  • US20250278300A1 patent drawing
  • US20250278300A1 patent drawing

AI summary

An exemplary system, method and computer-accessible medium for assigning a plurality of tasks to a plurality of computing nodes can include, for example, receiving first information related to the computing nodes, where the first information can include a number of cores in each of the computing nodes, generating second information by separating the number of cores in each of the computing nodes, and assigning the tasks to the computing nodes based on the second information. The first information can further include (i) a distance of a network connection between each of the computer nodes, and (ii) a bandwidth of the network connection. The second information can be generated based on the tasks. The second information can be generated based on a number of dimensions of the tasks. The tasks can be assigned based on a minimization of a number of communications between the nodes.