Doped Amorphous Silicon Nucleation Layer for Conformal Metal Deposition
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Solution Overview
Problem
Conventional methods for depositing amorphous silicon films face challenges in achieving conformality and gap-fill performance in high aspect-ratio features, particularly due to high temperature requirements and poor nucleation performance in atomic layer deposition of tungsten films, which can damage substrate surfaces.
Innovation Solution
The method involves forming a doped amorphous silicon layer using a silicon precursor like disilane and a dopant like diborane at reduced temperatures, replacing traditional nucleation layers with a doped amorphous silicon layer, and using a TiN glue layer to enhance conformality, allowing for the deposition of metal layers such as tungsten or molybdenum without exposing the substrate to damaging precursors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Temperature
If conventional LPCVD process is used for amorphous silicon deposition, then high temperature deposition is achieved, but step coverage and gap-fill performance deteriorate
Solution Approach 1:
The patent changes the deposition parameters by using PECVD process with specific power density ranges (50-500 W/cm³) and pressure ranges (0.1-10 Torr) to achieve conformal deposition at lower temperatures while improving step coverage and gap-fill performance
Solution Approach 2:
The patent employs pulsed deposition cycles with alternating exposure to silicon precursor and dopant gases, allowing controlled film growth with improved conformality in high aspect-ratio features
2Temperature
If PECVD process is used for amorphous silicon deposition, then lower temperature deposition is achieved, but step coverage and gap-fill performance deteriorate
Solution Approach 1:
The patent optimizes PECVD parameters including gas flow rates, pressure, and power density to achieve both lower temperature deposition and improved gap-fill performance through enhanced plasma chemistry and surface reaction control
Solution Approach 2:
The patent creates a composite doped amorphous silicon layer combining silicon precursor with dopants (phosphine, diborane, or silane) to modify film properties and improve conformality while maintaining lower temperature processing
3Ease of manufacture
If WF6 is directly exposed to substrate surface for ALD WSix deposition, then metal film deposition is achieved, but substrate damage occurs
Solution Approach 1:
The patent introduces a doped amorphous silicon layer as an intermediary between the substrate and the metal deposition process, enabling subsequent metal film deposition without direct exposure of the substrate to damaging WF6 precursor
Solution Approach 2:
The patent performs preliminary deposition of a protective doped amorphous silicon layer before metal deposition, preventing substrate damage from subsequent WF6 exposure during ALD tungsten or WSix deposition
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables conformal deposition of metal films at lower temperatures, improving step coverage and gap-fill performance while minimizing substrate damage, and modifying tungsten film properties through dopant concentration adjustments.
Implementation Method 1
The atomic layer deposition (ALD) of tungsten thin films exhibits very long incubation delay's on silicon, silicon dioxide and titanium nitride services due to poor nucleation performance. A nucleation layer is usually used to mitigate this issue.
Implementation Method 2
processing methods comprising exposing a substrate surface to a silicon precursor and a dopant to form a doped amorphous silicon layer
Data Source
AI summary
Methods for depositing a metal film on a doped amorphous silicon layer as a nucleation layer and/or a glue layer on a substrate. Some embodiments further comprise the incorporation of a glue layer to increase the ability of the doped amorphous silicon layer and metal layer to stick to the substrate.