Doped Dummy Fin Dielectrics for Oxidation-Resistant 3D Fin Fabrication
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Solution Overview
Problem
The fabrication of integrated circuits with three-dimensional transistors faces challenges in the formation of dummy fins, which lack resistance to oxygen ingress and oxidation, and are susceptible to dimensional changes during processing, affecting device yield and reliability.
Innovation Solution
Incorporating interstitial dopants such as boron, lithium, or beryllium into the dielectric material of dummy fins to enhance their resistance to oxidation and maintain lithographically defined critical dimensions, while withstanding a broader range of processing temperatures.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If dummy fins are formed using conventional dielectric materials, then they can be easily manufactured, but they lack resistance to oxygen ingress and oxidation, causing dimensional changes during processing
Solution Approach 1:
The patent applies parameter changes by doping dielectric materials with specific elements (boron, phosphorus, silicon) at controlled concentrations to alter their chemical composition and oxidation resistance properties. This allows conventional dielectric materials to be transformed into oxidation-resistant materials through compositional modification rather than replacing them entirely
Solution Approach 2:
The patent employs composite materials by creating doped dielectric layers that combine base dielectric materials (such as silicon oxide, silicon nitride) with dopant elements. These composite structures provide both the dielectric properties needed for dummy fin formation and enhanced resistance to oxidation through the dopant elements
2Manufacturing precision
If dummy fins are formed without dopants, then the manufacturing process is simpler, but they are susceptible to dimensional changes during processing
Solution Approach 1:
The patent modifies the physical and chemical parameters of dielectric materials by introducing dopants that stabilize the material structure during processing. This prevents dimensional changes in dummy fins while maintaining manufacturability through established doping techniques
Solution Approach 2:
The patent applies preliminary action by pre-doping the dielectric materials before dummy fin formation. This preliminary modification of the material properties ensures that the dummy fins maintain their critical dimensions throughout subsequent processing steps without requiring additional protective measures
3Temperature
If conventional dielectric materials are used for dummy fins, then material deposition is easier, but they cannot withstand a broader range of processing temperatures
Solution Approach 1:
The patent changes the thermal stability parameter of dielectric materials through dopant addition. Elements like boron and silicon modify the thermal properties of the dielectric, enabling the material to withstand broader temperature ranges encountered in advanced semiconductor processing
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The use of doped dielectric materials improves the robustness and reliability of dummy fins, reducing etch loss and maintaining critical dimensions, thereby enhancing the yield and performance of integrated circuit manufacturing.
Implementation Method 1
Incorporating interstitial dopants such as boron, lithium, or beryllium into the dielectric material of dummy fins to enhance their resistance to oxidation
Implementation Method 2
removing the sacrificial layer to form dummy fins
Data Source
AI summary
A method of manufacturing a semiconductor device includes: forming mutually parallel three-dimensional (3D) conductive channels coated with a conformal sacrificial layer, the 3D conductive channels coated with the conformal sacrificial layer being formed on a semiconductor substrate; depositing a dielectric material to fill spaces between the 3D conductive channels coated with the conformal sacrificial layer, wherein a portion or all of the deposited dielectric material is doped with boron, lithium, or beryllium; performing chemical mechanical polishing (CMP) to remove a top portion of the deposited dielectric material and to expose tops of the 3D conductive channels; and after the CMP, removing the conformal sacrificial layer coating the 3D conductive channels by etching to form 3D dielectric features spaced apart from the 3D conductive channels and comprising the deposited dielectric material.