Doped Oxide Selection Device for Resistive Memory Integration
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Non-volatile resistive random access memories face challenges with parasitic leakage currents in crossbar architectures, limiting integration density and complexity due to the use of transistors as selection devices, which are large and incompatible with the architecture.
Innovation Solution
A selection device with a doped oxide layer, preferably using elements from column IV of the periodic table, such as silicon, is integrated with resistive non-volatile memory cells, allowing for similar structure and manufacturing processes, and having a non-linear current-voltage characteristic to isolate adjacent cells and facilitate switching.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a transistor is used as a selection device to attenuate parasitic currents, then the selection capability is improved, but the device complexity and integration density are worsened due to large dimensions and incompatibility with crossbar architecture
Solution Approach 1:
The oxide layer is doped with column IV elements at controlled concentrations (0.1-5% atomic ratio) to modify the electrical properties and create non-linear current-voltage characteristics, enabling selection functionality without transistors
Solution Approach 2:
The selection device uses a composite structure combining metal electrodes with doped oxide layers, integrating multiple materials with complementary properties to achieve both selection capability and compact size
2Reliability
If a transistor is used as a selection device to attenuate parasitic currents, then the selection capability is improved, but the integration density is worsened due to large dimensions
Solution Approach 1:
Doping the oxide layer with column IV elements changes the electrical parameters to achieve non-linear I-V characteristics, providing transistor-like selection behavior in a much smaller footprint
Solution Approach 2:
The invention transitions from planar transistor structures to vertical stacked structures, utilizing the third dimension to achieve compact integration while maintaining selection functionality
3Reliability
If higher supply voltages are used in flash memories to achieve non-volatile storage, then the storage capability is improved, but the energy consumption and operating complexity are worsened
Solution Approach 1:
The doped oxide layer enables resistive switching at lower voltages by modifying the electrical properties through doping, reducing energy consumption while maintaining non-volatile storage capability
Solution Approach 2:
The invention replaces the charge-trapping mechanism of flash memory with a resistive switching mechanism based on ionic conduction in doped oxide, enabling lower voltage operation
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enables efficient integration of selection devices with resistive non-volatile memory cells, reducing parasitic currents and preserving resistive properties, thus enhancing integration density and capacity while operating at lower voltages.
Implementation Method 1
the oxide layer being doped with an element from column IV of the periodic table
Implementation Method 2
the resistive behaviour of the selection device is modified by the doping of the oxide layer in such a way that the selection device has a current-voltage characteristic
Data Source
AI summary
A device for selecting a storage cell, includes a first electrode, a second electrode and an oxide layer disposed between the first electrode and the second electrode, wherein the oxide layer is doped with a first element from column IV of the periodic table.