B-Site Doped Perovskite Capacitor Stack for Low-Voltage Ferroelectric Memory
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Solution Overview
Problem
Conventional semiconductor memory technologies face challenges in achieving high remnant polarization and low coercive voltage for ultra-low voltage operation, particularly in advanced technology nodes, where maintaining nonvolatility and high cycling endurance is crucial.
Innovation Solution
A semiconductor device with a capacitor comprising a polar layer doped with a metal element that differs from the base polar material, featuring crystalline conductive oxide electrodes and barrier metal layers, engineered to achieve a ferroelectric switching voltage and remnant polarization suitable for nonvolatile memory applications, with a ferroelectric oxide layer having a lattice constant matched to the electrodes and a thickness optimized for low voltage switching.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional dielectric materials are used in DRAM capacitors, then the device can operate with simple structure, but the leakage current is high and data retention is poor
Solution Approach 1:
The patent changes the fundamental parameter of the dielectric material from conventional materials (SiO2, Si3N4) to ferroelectric materials (PBMT, PMN-PT, PZT). This material parameter change enables nonvolatile data retention while reducing leakage current, as ferroelectric materials maintain their polarization state without continuous power supply.
Solution Approach 2:
The patent employs composite material structures including ferroelectric capacitor stacks integrated with transistor devices, and uses doped semiconductor layers (e.g., phosphorus-doped silicon germanium) to create materials with optimized properties that combine low leakage with high switching performance.
2Area of stationary object
If the dielectric constant is increased to maintain capacitance as device footprint scales down, then the capacitor can function at smaller sizes, but the leakage current increases
Solution Approach 1:
The patent changes the material parameter from conventional dielectrics to ferroelectric materials which provide high dielectric constant with low leakage. The ferroelectric capacitor structure maintains capacitance at reduced footprints without the leakage penalty that would normally accompany increased dielectric constant in conventional materials.
3Reliability
If ferroelectric materials are used to achieve nonvolatility, then data retention without power is improved, but the fabrication process complexity increases
Solution Approach 1:
The patent incorporates ferroelectric capacitor fabrication steps into the existing DRAM manufacturing process flow at appropriate stages. By planning and integrating ferroelectric layer deposition and processing into the preliminary fabrication sequence, the patent achieves nonvolatility without requiring completely separate or overly complex fabrication processes.
4Area of stationary object
If the capacitor is made smaller to increase memory density, then the device footprint is reduced, but the leakage current increases and retention worsens
Solution Approach 1:
The patent changes the fundamental material parameter to ferroelectric materials which provide high dielectric constant and low leakage simultaneously. This enables capacitor miniaturization for increased memory density while maintaining or improving data retention, overcoming the scaling limitations of conventional dielectric materials.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enables fast, low-voltage switching with high remnant polarization, enhancing the nonvolatility and cycling endurance of semiconductor memory devices, addressing the limitations of conventional technologies in advanced technology nodes.
Implementation Method 1
a ferroelectric switching voltage of the capacitor is different from that of the capacitor having the base polar material without being doped with the dopant
Implementation Method 2
a remnant polarization of the polar layer is different than that of the base polar material without the dopant
Data Source
AI summary
The disclosed technology generally relates to ferroelectric materials and semiconductor devices, and more particularly to semiconductor memory devices incorporating doped polar materials. In one aspect, a semiconductor device comprises a capacitor which in turn comprises a polar layer comprising a base polar material doped with a dopant. The base polar material includes one or more metal elements and one or both of oxygen or nitrogen. The dopant comprises a metal element that is different from the one or more metal elements and is present at a concentration such that a ferroelectric switching voltage of the capacitor is different from that of the capacitor having the base polar material without being doped with the dopant by more than about 100 mV. The capacitor stack additionally comprises first and second crystalline conductive oxide electrodes on opposing sides of the polar layer. The capacitor stack further comprises first and second barrier metal layers on respective ones of the first and second crystalline conductive oxide electrodes on opposing sides of the polar layer.