Doped Polar Capacitor Layers for Low-Voltage Ferroelectric Memory
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Solution Overview
Problem
Conventional semiconductor memory technologies face challenges in achieving high remnant polarization and low coercive voltage for ultra-low voltage operation, particularly in advanced technology nodes, where maintaining nonvolatility and high cycling endurance is crucial.
Innovation Solution
A semiconductor device with a capacitor stack featuring a polar layer doped with a metal element from the 4d, 5d, 4f, or 5f series, integrated between crystalline conductive oxide electrodes, which alters the ferroelectric switching voltage and remnant polarization, enabling efficient low-voltage switching and nonvolatile memory storage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional dielectric materials are used in DRAM capacitors, then the device can operate with simple structure, but the remnant polarization is insufficient and leakage current is high
Solution Approach 1:
The patent changes the fundamental parameter of the dielectric material from conventional linear dielectrics to ferroelectric materials, which exhibit spontaneous polarization and hysteresis. This parameter change enables the capacitor to retain charge without continuous power supply, achieving nonvolatile memory operation while reducing leakage current through the material's inherent electrical properties
Solution Approach 2:
The patent employs composite material structures including ferroelectric capacitor stacks integrated with transistor devices, combining different functional materials (ferroelectric dielectric layers, conductive electrodes, semiconductor materials) to create a unified memory device that achieves both nonvolatile storage and active transistor control in a single integrated structure
2Reliability
If ferroelectric materials are used to achieve nonvolatility, then data can be retained without power, but access time increases compared to volatile memory
Solution Approach 1:
The patent applies local quality by creating distinct functional regions within the memory device: the ferroelectric capacitor stack provides nonvolatile storage with fast switching characteristics, while the integrated transistor provides rapid read/write control. This spatial differentiation of functions allows each component to optimize its local performance, achieving both fast access and nonvolatile retention
3Productivity
If device footprint is scaled down with advancing technology nodes, then integration density increases, but maintaining high dielectric constant and low leakage becomes more difficult
Solution Approach 1:
The patent transitions from planar capacitor structures to vertically stacked three-dimensional capacitor configurations. This dimensional change allows the dielectric material volume (and thus capacitance) to increase significantly within the same footprint, achieving higher integration density while maintaining or improving dielectric performance through the enhanced vertical stacking geometry
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution achieves high remnant polarization and low coercive voltage, enhancing the semiconductor device's ability to maintain data integrity for extended periods at room temperature, with improved cycling endurance and reduced power consumption.
Implementation Method 1
a polar layer comprising a base polar material doped with a dopant, wherein the base polar material includes one or more metal elements and one or both of oxygen or nitrogen, and wherein the dopant comprises a metal element that is different from the one or more metal elements and is present at a concentration such that a ferroelectric switching voltage of the capacitor is different from that of the capacitor having the base polar material without being doped with the dopant
Data Source
AI summary
The disclosed technology generally relates to ferroelectric materials and semiconductor devices, and more particularly to semiconductor memory devices incorporating doped polar materials. In one aspect, a semiconductor device comprises a capacitor, which in turn comprises a polar layer comprising a crystalline base polar material doped with a dopant. The base polar material includes one or more metal elements and one or both of oxygen or nitrogen, wherein the dopant comprises a metal element that is different from the one or more metal elements and is present at a concentration such that a ferroelectric switching voltage of the capacitor is different from that of the capacitor having the base polar material without being doped with the dopant by more than about 100 mV. The capacitor additionally comprises first and second crystalline conductive or semiconductive oxide electrodes on opposing sides of the polar layer, wherein the polar layer has a lattice constant that is matched within about 20% of a lattice constant of one or both of the first and second crystalline conductive or semiconductive oxide electrodes. The first crystalline conductive or semiconductive oxide electrode serves as a template for growing the polar layer thereon, such that at least a portion of the polar layer is pseudomorphically formed on the first crystalline conductive or semiconductive oxide electrode.