Heavily Doped Semiconductor Power Distribution for Low-CTE Die Bonding

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Solution Overview

Problem

Existing power delivery devices face challenges in efficiently providing power to semiconductor devices due to thermal and mechanical stresses caused by high coefficients of thermal expansion (CTE) in metal planes, limited space for vias, and insufficient power supply to multiple integrated device dies.

Innovation Solution

The use of heavily doped semiconductor materials within a semiconductor power delivery device, which are bonded directly to the integrated device dies without an intervening adhesive, allows for improved power and ground distribution while reducing thermal stresses and increasing signal connections.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Power

If metal planes are used for power distribution, then power delivery capability is improved, but thermal and mechanical stresses increase due to high coefficients of thermal expansion

Engineering Contradiction:
Improvepower delivery capabilityVSAvoidthermal and mechanical stresses
Core Design Contradiction:
PowerVSObject-affected harmful factors

Solution Approach 1:

The patent changes the material parameter from metal to heavily doped semiconductor material, which fundamentally alters the coefficient of thermal expansion from high (metal) to low (semiconductor), thereby reducing thermal and mechanical stresses while maintaining power delivery capability through high doping concentration

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent uses heavily doped semiconductor material that combines the low thermal expansion properties of semiconductor with high electrical conductivity typically associated with metal, creating a composite-like material that simultaneously addresses power delivery and thermal stress requirements

Inventive Principle:
Principle #40Composite materials

2Power

If more vias are added for power distribution to multiple dies, then power supply capability is improved, but space for signal connections is reduced

Engineering Contradiction:
Improvepower supply capabilityVSAvoidspace for signal connections
Core Design Contradiction:
PowerVSArea of stationary object

Solution Approach 1:

The heavily doped semiconductor regions serve multiple functions simultaneously: they provide power distribution, ground distribution, and thermal management capabilities within the same material structure, eliminating the need for separate metal planes and vias for each function

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent merges the power distribution function with the substrate structure itself by creating heavily doped regions within the semiconductor material, combining what were previously separate functions (metal planes, vias, and substrate) into a unified structure

Inventive Principle:
Principle #5Merging (Combining)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables efficient power delivery to multiple integrated device dies, reduces mechanical and thermal strain, and optimizes the use of limited space by allowing for more signal connections at the active surface of the die.

Implementation Method 1

a first layer comprising a first heavily doped semiconductor material... a second layer comprising a second heavily doped semiconductor material

Methodology Applied
Scientific EffectElectrical conduction: Conduction (electrical)

Implementation Method 2

the heavily doped semiconductor material has a coefficient of thermal expansion (CTE) within 50% to 150%, 50% to 200%, 25% to 150%, or, 50% to 100% of a CTE of a device portion of the integrated device die

Methodology Applied
Scientific EffectThermal expansion: Thermal Expansion

Implementation Method 3

The heavily doped semiconductor material layers can be directly bonded to the integrated device die or to other layers

Methodology Applied
Scientific EffectDirect bonding: Welding

Data Source

PatentUS20250054854A1Heavily doped semiconductor devices for power distribution
Publication Date: 2025.02.13 ADEIA SEMICONDUCTOR BONDING TECHNOLOGIES INC
  • US20250054854A1 patent drawing
  • US20250054854A1 patent drawing
  • US20250054854A1 patent drawing

AI summary

A device including a first integrated device die and a semiconductor device. The first integrated device die can include a die insulating layer and a die conductive feature at least partially embedded in the die insulating layer. The semiconductor device can include a first insulating layer on the first surface, a device conductive feature at least partially embedded in the first insulating layer, and a first heavily doped semiconductor material electrically connected to the device conductive feature. The die conductive feature can be connected to power or ground through at least the first heavily doped semiconductor material.