Doped Silicon Nitride Charge Trap Layer for Flash Memory Retention
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Solution Overview
Problem
Current flash memory devices face challenges in charge retention due to the decreasing size of charge trap cells, leading to reduced storage capacity and increased electrical coupling between adjacent cells, which affects the density and efficiency of memory storage.
Innovation Solution
A flash memory device is fabricated with a silicon dioxide layer and a doped silicon nitride layer that includes a compositional gradient in the silicon to nitrogen ratio, along with treatments such as ultraviolet radiation or electron beam exposure to increase the concentration of dangling bonds, enhancing charge retention properties by creating deeper energy wells for trap sites.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the size of charge trap cells is decreased to increase memory density, then the storage capacity per unit area increases, but the charge retention time decreases due to reduced trap cell capacity and increased electrical coupling between adjacent cells
Solution Approach 1:
The patent applies local quality by creating a compositional gradient within the silicon nitride layer, where the silicon to nitrogen ratio varies through the thickness of the layer. This gradient structure provides different local properties: regions with higher nitrogen content create deeper energy wells for charge trapping, while regions with higher silicon content provide better structural stability. This local variation in composition allows the layer to simultaneously achieve deep trap sites for long retention and structural integrity, resolving the contradiction between density and retention time.
Solution Approach 2:
The patent employs parameter changes by modifying the silicon to nitrogen ratio as a continuous variable through the layer thickness. By controlling this compositional parameter to vary gradually, the invention creates a profile that optimizes both charge trapping depth and structural properties. The compositional gradient represents a systematic change in material parameters that enables the layer to function effectively at smaller cell sizes while maintaining charge retention performance.
2Ease of manufacture
If conventional silicon nitride layers are used without compositional variation, then the manufacturing process is simple, but the charge retention time is insufficient due to shallow energy wells and thermal de-trapping
Solution Approach 1:
The patent uses parameter changes by implementing a compositional gradient in the silicon nitride layer, where the silicon to nitrogen ratio is systematically varied through the layer thickness. This gradient creates deeper energy wells that reduce thermal de-trapping, significantly improving charge retention time while remaining compatible with existing semiconductor manufacturing processes.
Solution Approach 2:
The patent applies composite materials by creating a silicon nitride layer with non-uniform composition - essentially a composite structure where regions of different silicon to nitrogen ratios coexist within a single layer. This composite approach allows the material to exhibit both deep trap sites (from nitrogen-rich regions) and structural stability (from silicon-rich regions), achieving long charge retention without complex multi-layer structures.
3Quantity of substance
If the number of electrons that may be loaded onto a charge trap layer is increased, then the storage capacity per cell increases, but the device size must increase, reducing the overall device density
Solution Approach 1:
The patent applies local quality by creating regions within the charge trap layer that have enhanced charge trapping capability through compositional variation. The gradient structure concentrates trapping sites in specific regions, allowing more electrons to be stored in a given volume without proportionally increasing the device area, thus maintaining high density.
Solution Approach 2:
The patent uses another dimension by utilizing the thickness dimension of the charge trap layer to vary composition. Instead of increasing area to increase capacity, the invention varies the silicon to nitrogen ratio through the thickness of the layer, creating a three-dimensional solution that increases storage capacity without increasing the planar device footprint.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The approach significantly improves charge retention time by optimizing the ratio of silicon to nitrogen dangling bonds, increasing the number of deep energy wells, and reducing thermal de-trapping of charge, thereby enhancing the storage capacity and efficiency of the memory device.
Implementation Method 1
The silicon nitride layer is exposed to ultraviolet radiation having a wavelength of from about 150 nm to about 1200 nm
Implementation Method 2
The silicon nitride layer is exposed to an electron beam
Implementation Method 3
A plasma-treated silicon nitride layer is formed on the silicon dioxide layer by: (1) placing the substrate in a process zone; (2) depositing a silicon nitride layer on the substrate by (i) introducing a first process gas into the process zone, the first process gas comprising a silicon-containing component and a nitrogen-containing component, and generating a plasma of the first process gas in the process zone to; and (3) forming a plasma-treated silicon nitride layer by (i) stopping or changing the flow of the first process gas to provide a second process gas into the process zone, the second process gas comprising an inert or non-reactive gas, and (ii) generating a plasma of the second process gas in the process zone to treat the deposited silicon nitride layer
Data Source
AI summary
A flash memory device and methods of forming a flash memory device are provided. The flash memory device includes a doped silicon nitride layer having a dopant comprising carbon, boron or oxygen. The doped silicon nitride layer generates a higher number and higher concentration of nitrogen and silicon dangling bonds in the layer and provides an increase in charge holding capacity and charge retention time of the unit cell of a non-volatile memory device.