Doped Work Function Metal Gate Stack for Threshold Voltage Tuning
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Solution Overview
Problem
As semiconductor devices continue to shrink in feature size, challenges arise in integrating more components into a given area, requiring innovative solutions to maintain performance and efficiency, particularly in tuning threshold voltage and work function for field effect transistors.
Innovation Solution
A gate stack structure with a pair of work function metal layers that generate dipoles is implemented, utilizing a replacement gate process to form a metal gate stack with a bottom and top work function metal layer, where the layers have different group electronegativities due to doping, allowing for tuning of the threshold voltage by adjusting dopant concentration.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If minimum feature size is reduced to increase integration density, then more components can be integrated into a given area, but threshold voltage control and work function tuning become more difficult
Solution Approach 1:
The gate electrode is segmented into multiple distinct layers including a first work function metal layer, a second work function metal layer, and an intermediate layer. This segmentation allows independent control of each layer's composition and thickness, enabling precise tuning of the overall work function and threshold voltage even as feature sizes are reduced for higher integration density.
Solution Approach 2:
Different regions of the gate electrode structure have different material compositions and properties. The first work function metal layer contains a first dopant concentration while the second work function metal layer contains a second dopant concentration, creating local quality variations that enable precise threshold voltage control in miniaturized devices.
2Productivity
If feature size is reduced to increase integration density, then more components fit in given area, but work function tuning precision deteriorates
Solution Approach 1:
The gate electrode is divided into multiple discrete layers with different work function metals and dopant concentrations. This segmentation provides multiple independent variables (layer thicknesses, material compositions, dopant levels) that can be adjusted to precisely control the effective work function, maintaining tuning precision even as overall device dimensions are reduced.
Solution Approach 2:
The gate electrode uses a composite structure combining multiple work function metals (such as tungsten, titanium nitride, tantalum nitride) with different dopant concentrations. This composite material approach enables fine-grained control of the effective work function by adjusting the proportion and properties of each component layer, achieving precise work function tuning in miniaturized devices.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enables precise tuning of the effective work function and threshold voltage, enhancing the performance and integration density of semiconductor devices, particularly in field effect transistors, while maintaining efficient resistance and conductivity.
Implementation Method 1
At least one of the top and bottom WF metal layers includes dopants
Data Source
AI summary
A semiconductor device includes a substrate, a gate stack, and epitaxy structures. The substrate has a P-type region. The gate stack is over the P-type region of the substrate and includes a gate dielectric layer, a bottom work function (WF) metal layer, a top WF metal layer, and a filling metal. The bottom WF metal layer is over the gate dielectric layer. The top WF metal layer is over and in contact with the bottom WF metal layer. Dipoles are formed between the top WF metal layer and the bottom WF metal layer, and the dipoles direct from the bottom WF metal layer to the top WF metal layer. The filling metal is over the top WF metal layer. The epitaxy structures are over the P-type region of the substrate and on opposite sides of the gate stack.