Doped Work Function Metal Layers for FET Threshold Voltage Tuning
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Solution Overview
Problem
As the semiconductor industry continues to reduce minimum feature sizes to improve integration density, new challenges arise that need to be addressed, such as the need for more effective methods to tune the threshold voltage of field effect transistors (FETs) in semiconductor devices.
Innovation Solution
The implementation of a gate stack structure with a pair of work function metal layers that generate dipoles, allowing for the tuning of the threshold voltage in FETs. This is achieved by using a bottom work function metal layer with dopants, such as oxygen, and a top work function metal layer with different dopants, such as carbon, to create dipoles that adjust the effective work function.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a single work function metal layer is used in the gate stack, then the device structure is simpler, but the ability to tune threshold voltage is limited
Solution Approach 1:
The gate stack is segmented into multiple work function metal layers (first work function metal layer and second work function metal layer) with different dopant concentrations. This segmentation allows independent tuning of threshold voltage through dopant concentration gradients across the layers, providing enhanced adaptability while maintaining a manageable structural complexity through systematic layering.
Solution Approach 2:
Different regions of the work function metal layers are doped with different concentrations of dopants (e.g., oxygen in the first layer, carbon in the second layer). This local quality variation creates spatially differentiated work function characteristics, enabling precise threshold voltage tuning in specific areas of the gate stack without requiring complete structural redesign.
2Manufacturing precision
If dopant concentration in work function metal layers is increased to tune threshold voltage, then threshold voltage control is improved, but manufacturing precision requirements increase
Solution Approach 1:
The invention changes the dopant concentration parameter systematically across different work function metal layers. By establishing a dopant concentration gradient (e.g., higher oxygen concentration in the first layer, higher carbon concentration in the second layer), the threshold voltage can be tuned without requiring extreme precision in any single layer, as the effects are distributed across multiple layers.
Solution Approach 2:
The gate stack employs composite material structure with multiple work function metal layers, each containing different dopant concentrations. This composite approach allows the system to achieve precise threshold voltage control through the combined effect of multiple layers with moderate dopant concentrations, rather than requiring a single layer with extreme dopant concentration control.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution effectively tunes the threshold voltage of the metal gate stack, enabling improved performance and efficiency in semiconductor devices by adjusting the dopant concentration in the work function metal layers.
Implementation Method 1
a pair of doped work function (WF) metal layers are formed over the gate dielectric layer. The pair of doped WF metal layers includes a bottom WF metal layer and a top WF metal layer
Implementation Method 2
The pair of doped WF metal layers includes a bottom WF metal layer and a top WF metal layer, where the top WF metal layer is thicker than the bottom WF metal layer and each of the top and bottom WF metal layers include dopants
Data Source
AI summary
A semiconductor device includes a substrate, a gate stack, and epitaxy structures. The substrate has a P-type region. The gate stack is over the P-type region of the substrate and includes a gate dielectric layer, a bottom work function (WF) metal layer, a top WF metal layer, and a filling metal. The bottom WF metal layer is over the gate dielectric layer. The top WF metal layer is over and in contact with the bottom WF metal layer. Dipoles are formed between the top WF metal layer and the bottom WF metal layer, and the dipoles direct from the bottom WF metal layer to the top WF metal layer. The filling metal is over the top WF metal layer. The epitaxy structures are over the P-type region of the substrate and on opposite sides of the gate stack.


