Dot-Matrix Display Serial-to-Parallel Converter Circuit
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing dot-matrix display devices face inefficiencies in data transfer due to serial input of address and image data, leading to slower operations and potential improper control of refresh timing, especially when trying to use higher clock frequencies.
Innovation Solution
A dot-matrix display device incorporating a converter circuit that synchronizes serial signals with a first clock signal to convert them into parallel signals, using a second clock signal with a lower frequency to control the timing of this conversion, along with a control circuit that manages the serial-to-parallel conversion and operates in synchronization with the second clock signal, allowing for faster data transfer and improved refresh control.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If serial input method is used for address and image data, then device complexity is reduced, but data transfer speed becomes slow
Solution Approach 1:
The patent divides the data input process into two distinct phases: a serial input phase for address data (reducing complexity) and a parallel transfer phase for image data (increasing speed). The converter circuit segments the operation timing between these two modes, allowing the system to benefit from both serial simplicity and parallel performance.
2Speed
If higher clock frequency is used, then data transfer speed is improved, but control timing becomes improper
Solution Approach 1:
The patent implements dynamic clock frequency switching between two modes: a first clock frequency during serial input (ensuring reliable timing for sequential operations) and a second clock frequency during parallel transfer (maximizing data throughput). This dynamic adaptation allows the system to optimize speed without sacrificing control timing accuracy.
3Productivity
If serial-to-parallel conversion is performed, then data transfer efficiency is improved, but device complexity increases
Solution Approach 1:
The patent introduces a converter circuit as an intermediary component that performs serial-to-parallel conversion. This dedicated mediator handles the complexity of conversion operations, allowing the rest of the display system to operate efficiently with parallel data while the converter manages the transition between serial and parallel formats.
4Use of energy by moving object
If power consumption is reduced, then energy efficiency is improved, but operation speed may be limited
Solution Approach 1:
The patent employs periodic switching between low-power serial input mode and high-speed parallel transfer mode. During serial input, the system operates at lower power consumption with the first clock frequency. During parallel transfer, it temporarily increases power usage to achieve high-speed data movement with the second clock frequency. This periodic action optimizes overall energy efficiency while maintaining necessary operation speeds.
Data Source
AI summary
A dot-matrix display device includes a display, a converter circuit, and a control circuit. The display includes multiple gate signal lines, multiple source signal lines, and multiple pixel circuits arranged at intersections of the multiple gate signal lines and source signal lines. The converter circuit obtains a serial signal SI in synchronization with a first clock signal SCK input from outside and converts the obtained serial signal to a parallel signal. The serial signal is input from outside serially. The serial signal includes address data for specifying, of the multiple pixel circuits, a pixel circuit to undergo a refresh of image data, and the image data to be provided to the specified pixel circuit. The control circuit generates, based on a second clock signal ENB_V having a lower frequency than the first clock signal, a control signal for controlling timing of serial-to-parallel conversion performed by the converter circuit.