Double Diffusion Break Interconnects for Nanosheet Device Isolation
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Solution Overview
Problem
As nanosheet devices scale down, they interfere with each other, making it difficult to form necessary contacts and breaks to separate them effectively in a smaller area, hindering the formation of interconnected microelectronic structures.
Innovation Solution
A microelectronic structure with a double diffusion break that extends across parallel nano devices, allowing for a conductive metal pad connection between the frontside and backside, enabling the formation of interconnecteds within the break.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If nanosheet devices are scaled down to fit more devices in a smaller area, then device density increases, but device interference increases and contact formation becomes difficult
Solution Approach 1:
The patent introduces double diffusion breaks that segment the continuous nanosheet structure into isolated device regions. These breaks create physical separations between adjacent nanosheet devices, preventing interference while maintaining high device density. The segmentation is achieved through selective removal of nanosheet material at break locations, forming isolated islands of active devices.
Solution Approach 2:
The patent utilizes the vertical dimension by forming contacts that extend through the substrate thickness to reach the double diffusion breaks. This vertical contact approach allows interconnection formation without requiring additional lateral space, enabling high-density packaging while maintaining proper device isolation and connectivity.
2Object-affected harmful factors
If double diffusion breaks are formed to separate devices, then device isolation improves, but interconnect formation within the break becomes difficult
Solution Approach 1:
The patent performs preliminary actions by forming placeholder structures and sacrificial layers at the double diffusion break locations before final device fabrication. These preliminary structures guide subsequent processing steps and enable easy formation of interconnect contacts within the breaks. The placeholders are removed and replaced with conductive interconnect material in later processing stages.
Solution Approach 2:
The patent uses sacrificial layers and placeholder structures as intermediary elements during fabrication. These intermediaries occupy the break spaces during early processing, then are removed to create pathways for interconnect formation. The intermediaries mediate between the need for device isolation and the need for easy interconnect access.
3Adaptability or versatility
If more contacts are formed to connect devices in smaller area, then device connectivity improves, but manufacturing complexity increases
Solution Approach 1:
The patent designs the double diffusion breaks to serve multiple functions simultaneously: they provide device isolation, create contact formation regions, and enable interconnect routing. This multi-functionality reduces the need for separate specialized structures for each function, simplifying the overall manufacturing process while maintaining high device connectivity.
Solution Approach 2:
The patent merges the isolation function and interconnect formation function into the same double diffusion break structure. Rather than requiring separate isolation regions and separate contact holes, the breaks themselves become the contact formation regions, combining multiple functions into a single structural feature that reduces manufacturing steps.
Data Source
AI summary
A microelectronic structure including a first nano device that includes a plurality of first transistors and a second nano device that includes a plurality of second transistors. The first nano device and the second nano device are parallel to each other. A doubled diffusion break that extends across the first nano device and the second nano device. A back-end-of-the-line (BEOL) layer located on a frontside of the first nano device and the second nano device. A backside interconnect located on a backside of the first nano device and the second nano device and the BEOL layer is connected to the backside interconnect through the double diffusion break.