Double Flip-Chip Power Package for High Temperature Thermal Management
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Solution Overview
Problem
Conventional power packages for wide band gap devices, such as Silicon Carbide and Gallium Nitride, face limitations in high frequency, high current density applications due to parasitic impedances, heat removal inefficiencies, and reliability issues, particularly with wire bonding and flip-chip attach methods, which hinder the full potential of these advanced power devices.
Innovation Solution
A wire bondless, double flip-chipped discrete power package design featuring a dual-sided solder connection, low profile, low inductance electrical paths, bolted connections, multiple base plate mounting locations for consistent thermal connection, and double-sided cooling, capable of housing both lateral and vertical devices, with a source Kelvin connection for improved performance and reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If wire bonding is used for interconnection, then ease of manufacture is improved, but parasitic impedances increase and reliability deteriorates
Solution Approach 1:
The patent extracts and eliminates the wire bonding process from the interconnection method. Instead of using wire bonds to connect the semiconductor die to the package leads, the invention directly bonds the die pads to the leads through a flip-chip technique, removing the intermediate wire bonding step that introduces parasitic impedance and potential failure points.
Solution Approach 2:
The patent introduces a solder or metallization layer as an intermediary bonding medium between the die pads and package leads. This intermediary layer provides a robust electrical and mechanical connection that replaces the wire bond, reducing parasitic impedance while maintaining ease of manufacture through standardized bonding processes.
2Device complexity
If conventional single-sided packaging is used, then device complexity is reduced, but heat removal efficiency deteriorates
Solution Approach 1:
The patent transitions from single-sided heat removal to double-sided heat removal by bonding the semiconductor die to the package substrate on both the front and back sides. This dimensional change allows heat to be extracted from both surfaces of the die, effectively doubling the heat removal capacity without significantly increasing device complexity.
Solution Approach 2:
The patent segments the heat removal function into two independent pathways by creating separate bonding interfaces on the front and back sides of the die. Each side can be independently optimized for thermal management, with heat sinks or cooling structures attached to both surfaces, dividing the thermal management task into manageable segments.
3Object-generated harmful factors
If flip-chip attach method is used, then parasitic impedances are reduced, but manufacturing precision requirements increase
Solution Approach 1:
The patent applies preliminary action by pre-forming solder bumps or metallization patterns on the die pads before the bonding process. This preliminary preparation ensures proper alignment and bonding quality, reducing the precision requirements during the actual flip-chip attach process while maintaining low parasitic impedances.
4Power
If high temperature operation is enabled, then power density is increased, but material reliability deteriorates
Solution Approach 1:
The patent employs composite materials consisting of high-temperature-resistant metallization layers, solder alloys with high melting points, and thermally stable substrate materials. These composite material systems are specifically selected and engineered to maintain structural integrity and electrical performance at elevated temperatures up to 225°C, enabling high power density operation while preserving material reliability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enables high current and high temperature performance up to 225°C, reduces parasitic impedances, enhances heat removal, and improves reliability, making it suitable for high performance power conversion systems with reduced size and complexity, while allowing for efficient thermal and electrical connections without the need for soldering.
Implementation Method 1
double sided flip chip power packaging
Implementation Method 2
bolted electrical connections for system integration
Data Source
AI summary
A wire bondless, double flip chipped discrete power package including a base plate for structural support, heat spreading, and thermal connection, power substrate for electrical interconnection and isolation, lead frames for external connections, an upper substrate for topside electrical interconnection, and injection molded housing for mounting, isolation, and protection.