Double Floating Gate Non-Volatile Memory with Aluminum Interface Layer

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Solution Overview

Problem

In non-volatile semiconductor storage devices with a 3-dimensional cell structure, the reduced distance between memory cells makes it difficult to provide sufficient space for the control gate, leading to challenges in applying an adequate electric field during writing/erasing due to the increased area ratio of the tunnel insulating film to the IPD film, which limits capacitance ratio and storage efficiency.

Innovation Solution

A double floating gate-type cell structure is implemented with multi-layered insulating films, including a tunnel insulating film, an IFD film, and an IPD film, where a layer containing aluminum or other specific atoms is formed at interfaces to alter the energy band structure, enhancing writing/erasing characteristics and reliability by reducing leak current and improving charge retention.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a 3-dimensional cell structure is used to increase capacitance ratio and improve writing/erasing characteristics, then the capacitance ratio between tunnel insulating film and IPD film increases, but the distance between adjacent memory cells increases making it difficult to reduce device density

Engineering Contradiction:
Improvewriting/erasing characteristicVSAvoiddistance between adjacent memory cells
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent transitions from a 3-dimensional cell structure to a flat cell structure, changing the vertical stacking approach to a planar configuration. This dimensional change allows the IPD film to be formed with a flat structure on the top surface of the floating gate, eliminating the need for vertical space while maintaining cell functionality and enabling higher device density.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent introduces a double floating gate-type cell structure with two insulating films (first and second insulating films) between the floating gate and control gate. By changing the structural parameters and adding an additional insulating layer, the patent compensates for the reduced capacitance ratio in the flat cell structure, thereby maintaining adequate electric field strength for writing/erasing operations despite the planar configuration.

Inventive Principle:
Principle #35Parameter changes

2Area of stationary object

If a flat cell structure with IPD film having flat structure is used to reduce distance between memory cells, then device density increases, but the area ratio of tunnel insulating film to IPD film decreases making it difficult to increase capacitance ratio

Engineering Contradiction:
Improvedistance between adjacent memory cellsVSAvoidcapacitance ratio
Core Design Contradiction:
Area of stationary objectVSReliability

Solution Approach 1:

The patent compensates for the reduced capacitance ratio in the flat cell structure by introducing a double floating gate configuration with two insulating films between the floating gate and control gate. This parameter change in the insulating film structure restores the necessary electric field strength for writing/erasing operations while maintaining the benefits of the flat cell structure for high device density.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If double floating gate-type cell structure with two insulating films is used to maintain capacitance ratio in flat cell structure, then writing/erasing characteristic improves, but device structure complexity increases

Engineering Contradiction:
Improvewriting/erasing characteristicVSAvoidstructure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent uses the same insulating film material and formation process for both the first and second insulating films in the double floating gate structure. This universal approach simplifies manufacturing by reusing proven processes and materials, reducing the complexity increase that would otherwise result from the dual-insulating-film structure.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS9478670B2Non-volatile semiconductor storage device
Publication Date: 2016.10.25 KIOXIA CORP
  • US9478670B2 patent drawing
  • US9478670B2 patent drawing
  • US9478670B2 patent drawing

AI summary

A non-volatile semiconductor storage device disclosed in the embodiment has a semiconductor substrate, a first insulating film, a first charge storage film, a second insulating film, a second charge storage film, a third insulating film, and a control electrode. In this non-volatile semiconductor storage device, the first and second charge storage films comprise a metallic material, a semi-metallic material or a semiconductor material. One of the first, second, and third insulating films is a multi-layered insulating film formed by layering multiple insulating films. This non-volatile semiconductor storage device further has a film comprising of any one of an oxide film, nitride film, boride film, sulfide film, and carbide film that is in contact with one interface of the laminated insulating film and contains one type of atom selected from aluminum, boron, alkaline earth metal, and transition metal at a concentration in the range of 1E12 atoms/cm2 to 1E16 atoms/cm2.