Double-Fuse Memory Cell Circuit for Bit-Flip Resistance

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Solution Overview

Problem

Existing memory devices with single-fuse elements are prone to unintentional bit flips due to accidental blowing of fuses, leading to data integrity issues.

Innovation Solution

The implementation of a double-fuse element memory device, where two fuse elements are connected in series and programmed individually, allowing for reliable storage and read operations by distinguishing between intact and blown fuses based on current measurements.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If a single-fuse element is used in a memory cell, then the device complexity is reduced, but the reliability of data storage deteriorates due to unintentional bit flips from accidental fuse blowing

Engineering Contradiction:

Improvememory cell structureVSAvoiddata storage reliability

Core Design Contradiction:

Device complexityVSReliability

Solution Approach 1:

The memory cell is segmented into multiple fuse elements (first fuse element and second fuse element) connected in series, where each fuse element can be independently programmed. This segmentation allows the system to distinguish between accidental single-fuse blows and intentional double-fuse blows, thereby improving data storage reliability while maintaining reasonable device complexity

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The patent implements a read window mechanism that checks the state of fuse elements before final programming is confirmed. By monitoring current flow through the series-connected fuses during intermediate stages, the system can detect and correct accidental fuse blows before they result in permanent data errors, providing a cushioning effect against reliability failures

Inventive Principle:

Principle #11Beforehand cushioning (Prior cushioning)

2Reliability

If multiple fuse elements are connected in series to improve reliability, then the likelihood of accidental bit flips is reduced, but the device complexity and programming difficulty increase

Engineering Contradiction:

Improvedata storage reliabilityVSAvoidmemory cell structure

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The series connection of multiple fuse elements serves multiple functions: it provides redundancy against accidental blows, enables intermediate state detection during programming, and allows for read window verification. This multi-functionality justifies the increased complexity by delivering significant reliability improvements

Inventive Principle:

Principle #6Universality (Multi-functionality)

3Manufacturing precision

If individual programming of fuse elements is implemented, then accurate data storage is achieved, but the programming time and operational complexity increase

Engineering Contradiction:

Improveprogramming accuracyVSAvoidprogramming time

Core Design Contradiction:

Manufacturing precisionVSLoss of time

Solution Approach 1:

The patent applies preliminary action by performing intermediate checks and read window verifications during the programming process. Before final programming is completed, the system checks the state of fuse elements to ensure accurate programming, preventing the need for re-programming and potentially reducing total programming time despite the additional verification steps

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The read window mechanism provides feedback during programming by monitoring current flow through the series-connected fuses. This feedback allows the system to verify programming status and make adjustments if needed, ensuring high programming accuracy while managing time through intelligent control rather than brute-force sequential programming

Inventive Principle:

Principle #23Feedback

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This solution significantly enhances data reliability by reducing the likelihood of accidental bit flips, as both fuses must be blown to represent a '1' bit, thereby ensuring accurate read operations.

Implementation Method 1

two fuse elements connected in series and programmed individually, allowing for reliable storage and read operations by distinguishing between intact and blown fuses based on current measurements

Methodology Applied

Scientific EffectElectrical Resistance: Electrical Resistance

Data Source

PatentUS12211568B2Multi-fuse memory cell circuit and method

Publication Date: 2025.01.28 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD

AI summary

A multi-fuse memory cell is disclosed. The circuit includes: a first fuse element electrically coupled to a first transistor, a gate of the first transistor is electrically coupled to a first selection signal; a second fuse element electrically coupled to a second transistor, a gate of the second transistor is electrically coupled to a second selection signal, both the first transistor and the second transistor are grounded; and a programming transistor electrically coupled to the first fuse element and the second fuse element, wherein a gate of the programming transistor is electrically coupled to a programming signal.