Double-Gate FeFET Structure for Stable Ferroelectric Integration
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Solution Overview
Problem
It is challenging to integrate ferroelectric materials with semiconductor device materials and structures while maintaining suitable ferroelectric properties and device performance, particularly in forming ferroelectric field effect transistors (FeFETs) with oxide semiconductors.
Innovation Solution
The development of FeFET devices with a double gate structure, where a first ferroelectric material layer is disposed between a gate electrode and one side of a channel layer, and a second ferroelectric material layer is disposed between a second gate electrode and the opposite side of the channel layer, allowing for improved polarization, memory window, and on-current through common or separated gate control modes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If ferroelectric materials are integrated with semiconductor device materials and structures, then device performance and ferroelectric properties can be maintained, but integration difficulty increases
Solution Approach 1:
The device is divided into two separate gates (top gate and bottom gate) with ferroelectric layers positioned between each gate and the channel layer. This segmentation allows independent optimization of each gate-ferroelectric interface, simplifying the integration process while maintaining ferroelectric properties in each layer
Solution Approach 2:
The channel layer acts as an intermediary between the two ferroelectric layers, enabling the integration of multiple ferroelectric materials with different semiconductor materials. The channel layer mediates the interface between ferroelectric and semiconductor materials, facilitating integration while preserving ferroelectric properties
2Reliability
If a double gate structure with ferroelectric layers is used, then polarization and memory window increase, but device complexity increases
Solution Approach 1:
The single gate structure is segmented into two separate gates (top and bottom), each with its own ferroelectric layer. This segmentation enables independent control of polarization in each layer, increasing total polarization and memory window while managing complexity through modular design
Solution Approach 2:
The double gate structure provides multi-functionality by enabling both independent gate control modes and combined gate control modes. The device can operate in different modes (independent control for fine-tuning, combined control for maximum performance), making the increased structural complexity worthwhile through enhanced functional capabilities
3Reliability
If a double gate structure with ferroelectric layers is used, then memory window and on-current increase, but device complexity increases
Solution Approach 1:
The memory window enhancement is achieved through segmentation into two ferroelectric layers that can contribute additively to the total memory window. Each layer can be optimized independently to maximize its contribution, increasing overall memory window while managing complexity through modular optimization
Solution Approach 2:
The device transitions from a single-gate two-dimensional control to a double-gate three-dimensional control structure. This dimensional change enables enhanced memory window and on-current by utilizing the vertical stacking of ferroelectric layers, achieving performance improvement through spatial expansion
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances the reliability and performance of FeFET-based memory devices by increasing polarization, memory window, and on-current, while maintaining stable ferroelectric properties, enabling effective encoding and reading of logic states.
Implementation Method 1
a first ferroelectric material layer is disposed between a gate electrode and one side of a channel layer, and a second ferroelectric material layer is disposed between a second gate electrode and the other side of the channel layer
Data Source
AI summary
A ferroelectric field effect transistor (FeFET) having a double-gate structure includes a first gate electrode, a first ferroelectric material layer over the first gate electrode, a semiconductor channel layer over the first ferroelectric material layer, source and drain electrodes contacting the semiconductor channel layer, a second ferroelectric material layer over the semiconductor channel layer, and a second gate electrode over the second ferroelectric material layer.


