Double-Gate IGBT Layout for Low-Loss Turn-Off Cut-Off

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Solution Overview

Problem

Existing double-gate-type IGBTs struggle to enhance turn-off cut-off resistance while maintaining low conduction and switching losses, primarily due to inadequate control of carrier concentration in the terminal region and boundary between the active and terminal regions.

Innovation Solution

The semiconductor device incorporates a central region with both switching and carrier control gates, a peripheral region with only carrier control gates, and a terminal region to control carrier concentration and reduce current concentration during turn-off switching.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of energy

If a double-gate-type IGBT structure is used to reduce conduction and switching losses, then power efficiency is improved, but turn-off cut-off resistance is insufficient due to inadequate carrier concentration control in the terminal region

Engineering Contradiction:

Improveconduction loss and switching lossVSAvoidturn-off cut-off resistance

Core Design Contradiction:

Loss of energyVSReliability

Solution Approach 1:

The semiconductor device is divided into three distinct regions: a central region with both switching and carrier control gates, a peripheral region with only carrier control gates, and a terminal region. This segmentation allows independent optimization of carrier concentration control in different areas, enabling low loss in the central region while maintaining high turn-off cut-off resistance in the peripheral and terminal regions

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

Different gate configurations are applied to different regions: the central region has both switching and carrier control gates for optimal power efficiency, while the peripheral region has only carrier control gates to enhance turn-off cut-off resistance. This local differentiation resolves the contradiction by allowing each region to be optimized for its specific function

Inventive Principle:

Principle #3Local quality

2Productivity

If carrier concentration is increased to handle higher current capacity, then current density is improved, but turn-off switching losses increase due to inadequate carrier extraction control

Engineering Contradiction:

Improvecurrent capacity and current densityVSAvoidturn-off switching loss

Core Design Contradiction:

ProductivityVSLoss of energy

Solution Approach 1:

The carrier control gate applies a preliminary negative voltage to the peripheral region before the main turn-off switching occurs. This preliminary action extracts carriers in advance from the peripheral and terminal regions, reducing the carrier concentration that would otherwise need to be extracted during the main switching event, thereby reducing turn-off switching losses while maintaining high current capacity

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The carrier control gate acts as an intermediary between the switching gate and the carrier concentration in the drift layer. By independently controlling carrier extraction through the carrier control gate, the system can manage carrier concentration levels to support high current density while minimizing the energy loss during turn-off switching

Inventive Principle:

Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration effectively reduces turn-off switching losses and enhances turn-off cut-off resistance, allowing for higher current capacity and density, thereby enabling larger capacitance and miniaturization of power conversion devices.

Implementation Method 1

an electron layer that is an inversion layer is generated on an interface of a gate electrode of a p type well layer 2

Methodology Applied

Scientific EffectInversion layer formation:

Implementation Method 2

the conductivity modulation is generated in the n-type drift layer 1

Methodology Applied

Scientific EffectConductivity modulation:

Implementation Method 3

hole carriers are extracted from a p type collector layer 4

Methodology Applied

Scientific EffectCarrier extraction:

Implementation Method 4

the carriers that contribute to the conductivity modulation by applying a voltage of less than a threshold voltage that does not form an inversion layer on an interface of a gate electrode of a p type well layer 2 to a gate are discharged to the emitter electrode 7 and the collector electrode 8

Methodology Applied

Scientific EffectCarrier discharge:

Data Source

PatentUS20250133764A1Semiconductor device and power conversion device using same

Publication Date: 2025.04.24 MINEBEA POWER SEMICON DEVICE INC

AI summary

Provided is a highly reliable semiconductor device having both a low conduction loss and a low switching loss, and, at the same time, can enhance turn-off cut-off resistance. The semiconductor device includes a switching gate and a carrier control gate that are driven independently of each other, and is characterized by comprising, as viewed in plan, a central region cell, a peripheral region cell surrounding the circumference of the central region cell, and a terminal region surrounding the circumference of the peripheral region cell, in which the central region cell includes a switching element having the switching gate and the carrier control gate, and the peripheral region cell is disposed between the central region cell and the terminal region, the switching element of the peripheral region cell having a gate only composed of the carrier control gate.