Double-Gate Trench IGBT Structure for Low Loss Turn-Off
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Solution Overview
Problem
Semiconductor devices, such as IGBTs, face challenges in reducing on-resistance and switching loss while maintaining breakdown voltage, as the ejection of carriers during turn-off is slow, leading to increased switching loss and potential element breakdown.
Innovation Solution
A trench gate-type IGBT design with double-gate driving capability, featuring a specific arrangement of gate electrodes and insulating films, where the distance between the upper surface of the fourth semiconductor region and the first electrode is greater than the distance between the boundary portion and the first electrode, allowing efficient hole ejection and improved breakdown immunity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of stationary object
If the carrier concentration of the drift region is increased to reduce on-resistance, then the on-resistance decreases, but the turn-off time lengthens and switching loss increases due to slow carrier ejection
Solution Approach 1:
The drift region is divided into a first drift region and a second drift region with different doping concentrations. The first drift region has a higher carrier concentration to reduce on-resistance, while the second drift region has a lower carrier concentration to facilitate faster carrier ejection during turn-off, thereby reducing switching loss. This segmentation allows both regions to optimize for their respective functions.
Solution Approach 2:
Different regions of the drift region are assigned different carrier concentrations tailored to local requirements. The first drift region (near the collector) has high carrier concentration for low on-resistance, while the second drift region (near the emitter) has low carrier concentration for rapid carrier removal during switching. This local differentiation resolves the contradiction between maintaining low resistance and enabling fast switching.
2Length of stationary object
If the carrier concentration of the drift region is increased to reduce on-resistance, then the on-resistance decreases, but element breakdown occurs more easily
Solution Approach 1:
The drift region is segmented into two zones with different doping levels. The first drift region with high carrier concentration provides low on-resistance, while the second drift region with low carrier concentration acts as a buffer that prevents excessive electric field buildup, thereby suppressing element breakdown during high-voltage operation.
Solution Approach 2:
The patent applies local quality by creating spatial variation in carrier concentration within the drift region. The high-concentration first drift region handles conduction losses, while the low-concentration second drift region handles voltage blocking and prevents breakdown, allowing each zone to optimize for its specific function.
3Loss of energy
If the turn-off time is reduced to decrease switching loss, then the switching loss decreases, but the carrier ejection becomes insufficient leading to higher on-resistance
Solution Approach 1:
The drift region is divided into first and second drift regions where the second region's low carrier concentration enables rapid carrier ejection during turn-off, reducing switching loss. Meanwhile, the first region's high carrier concentration ensures sufficient carriers remain available to maintain low on-resistance during the on-state, resolving the trade-off between switching speed and conduction losses.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The design reduces switching loss and enhances breakdown immunity by efficiently ejecting holes and maintaining low on-resistance, thereby improving the overall performance of the semiconductor device.
Implementation Method 1
a first gate electrode facing the second semiconductor region via a first insulating film in a second direction, and a second gate electrode facing the second semiconductor region via a second insulating film in the second direction
Implementation Method 2
When a first voltage is applied to the first gate electrode and a second voltage different from the first voltage is applied to the second gate electrode, an inversion layer is formed in the second semiconductor region
Data Source
AI summary
A semiconductor device includes a first electrode, a second electrode, a first semiconductor region, a second semiconductor region, a third semiconductor region, a fourth semiconductor region, a fifth semiconductor region, a first gate electrode, and a second gate electrode. The first gate electrode faces the second semiconductor region via a first insulating film. The second gate electrode faces the second semiconductor region via a second insulating film and faces the second electrode via a third insulating film contacting the second insulating film. The fifth semiconductor region includes a boundary portion that electrically contacts the second electrode. A distance between an upper surface of the fourth semiconductor region and the first electrode is greater than a distance between the boundary portion and the first electrode.