Double-Gate MFMIS-FET Structure for Higher ON Current Memory

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Solution Overview

Problem

Ferroelectric memory devices, such as FeFET and FeRAM, face limitations due to low ON current, which affects their performance in high-speed data applications by causing slow read and write speeds.

Innovation Solution

A double gate metal-ferroelectric-metal-insulator-semiconductor field-effect transistor (MFMIS-FET) structure is introduced, featuring a lower and upper gate electrode to control the polarization state of ferroelectric structures, resulting in a higher ON current and improved conductivity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If a conventional ferroelectric memory device structure is used, then the device can store data using ferroelectricity, but the ON current is low resulting in slow read and write speeds

Engineering Contradiction:
Improveread and write speedsVSAvoidON current
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The gate structure is segmented into multiple gates (first gate electrode and second gate electrode) positioned at different locations along the channel. This segmentation allows independent control of different channel regions, enabling higher ON current through coordinated gating while maintaining ferroelectric memory functionality for data storage

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The invention transitions from a conventional single-gate planar structure to a multi-gate three-dimensional configuration where gate electrodes are positioned at different spatial locations (e.g., top and bottom gates, or side gates). This dimensional change enhances electric field control over the channel, significantly improving ON current and thereby read/write speeds while preserving the ferroelectric storage mechanism

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Reliability

If a double gate MFMIS-FET structure is introduced, then the ON current and conductivity are improved, but the device complexity increases

Engineering Contradiction:
ImproveON currentVSAvoidgate electrode structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The multi-gate structure serves multiple functions simultaneously: the first and second gate electrodes collectively control channel conductivity to achieve high ON current, while the ferroelectric structures maintain data storage capability. This multi-functionality justifies the increased structural complexity by delivering both high performance and memory functionality

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The invention merges the control functions of multiple gate electrodes with the data storage function of ferroelectric structures in a unified device architecture. The gate electrodes and ferroelectric structures work together as an integrated system, where the combined structure achieves high ON current while maintaining the essential memory storage capability, thus balancing complexity with functional benefit

Inventive Principle:
Principle #5Merging (Combining)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The double gate MFMIS-FET structure enhances the ON current, leading to faster read and write speeds and expands the applications of ferroelectric memory in high-speed data applications.

Implementation Method 1

Some promising candidates for next generation memory technology utilize ferroelectricity to store data, such as ferroelectric field-effect transistor (FeFET) memory

Methodology Applied
Scientific EffectFerroelectricity:

Implementation Method 2

A first gate electrode and a second gate electrode may be disposed at different lateral locations along the channel structure. The first gate electrode and the second gate electrode may control a conductivity of the selectively-conductive channel

Methodology Applied
Scientific EffectField-effect transistor control:

Data Source

PatentUS20240373642A1Double gate metal-ferroelectric-metal-insulator-semiconductor field-effect transistor (mfmis-FET) structure
Publication Date: 2024.11.07 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20240373642A1 patent drawing
  • US20240373642A1 patent drawing
  • US20240373642A1 patent drawing

AI summary

Various embodiments of the present disclosure are directed towards an integrated chip (IC) comprising a lower gate electrode disposed in a dielectric structure. A first ferroelectric structure overlies the lower gate electrode. A first floating electrode structure overlies the first ferroelectric structure. A channel structure overlies the first floating electrode structure. A second floating electrode structure overlies the channel structure. A second ferroelectric structure overlies the second floating electrode structure. An upper gate electrode overlies the second ferroelectric structure.