Double-Gate Oxide TFT Layout to Prevent Step Disconnection
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Solution Overview
Problem
Existing TFTs with a double gate structure using oxide semiconductors face issues of step disconnection and increased electrical resistance in the source and drain regions, hindering high on-current performance.
Innovation Solution
A thin film transistor (TFT) design with a planar semiconductor layer, utilizing an organic insulating film to overlap and flush with the source and drain regions, and a double gate structure with overlapping gate electrodes, preventing step disconnection and reducing resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a double gate structure with inorganic insulating films is used, then gate control is improved, but step disconnection occurs in the oxide semiconductor layer
Solution Approach 1:
The patent uses a composite insulating film structure combining organic insulating film (first insulating film) and inorganic insulating film (second insulating film). The organic insulating film serves as a planarization layer that absorbs surface irregularities, while the inorganic insulating film provides gate control. This composite approach resolves the contradiction by allowing both step coverage and electrical performance.
Solution Approach 2:
The patent applies different materials with different properties at different locations: the organic insulating film is used specifically in regions where planarization is needed (under the oxide semiconductor layer), while the inorganic insulating film is used where gate control is critical. This local differentiation allows each material to optimize its function without causing step disconnection.
2Reliability
If a double gate structure with inorganic insulating films is used, then gate control is improved, but electrical resistance in source and drain regions increases
Solution Approach 1:
The combination of organic and inorganic insulating films creates a structure that provides both gate control and low resistance. The organic insulating film's planarization effect ensures uniform oxide semiconductor layer formation over source and drain regions, preventing resistance increase while the inorganic film maintains gate control.
Solution Approach 2:
The organic insulating film acts as an intermediary layer between the inorganic insulating film and the oxide semiconductor layer. It mediates the interface properties, ensuring good electrical contact in source and drain regions while allowing the inorganic film to provide gate control functionality.
3Manufacturing precision
If chemical mechanical polishing is used to planarize the oxide insulating film, then step disconnection is reduced, but manufacturing complexity increases
Solution Approach 1:
The patent uses a deposited organic insulating film layer that serves as a sacrificial planarization layer. This layer is formed by simple deposition processes, provides the needed planarization effect, and can be selectively removed or integrated into the final structure, avoiding the need for complex CMP processes.
Solution Approach 2:
The patent changes the material parameter from inorganic (requiring CMP) to organic (amenable to deposition), fundamentally altering the planarization approach. This parameter change enables simpler manufacturing while achieving the same surface flatness required to prevent step disconnection.
Data Source
AI summary
A TFT for each of sub-pixels constituting a display region includes: a semiconductor layer that is composed of an oxide semiconductor and in which a channel region, a source region, and a drain region are defined; a first gate electrode disposed on the side of the semiconductor layer facing the base substrate, the first gate electrode overlapping the channel region with a first gate insulating film therebetween; and a second gate electrode disposed on the side of the semiconductor layer facing away from the base substrate, the second gate electrode overlapping the channel region with a second gate insulating film therebetween. The semiconductor layer has a planar shape due to an organic insulating film that is disposed on the side of the semiconductor layer facing the base substrate and that overlaps at least the source region and the drain region.