Double-Gate Pixel Driving Circuit for Threshold Voltage Stability
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing pixel driving circuits face issues with non-uniformity in electrical parameters such as threshold voltage and mobility, leading to color unevenness and poor display performance due to long-term pressure and high temperature effects on transistors.
Innovation Solution
A pixel driving circuit with a double-gate transistor and a storage module, where one gate is controlled by a data signal to turn on the transistor in each frame period, and alternately controlled in subsequent periods, preventing negative electrons from being captured into the gate insulating layer, thus maintaining a stable threshold voltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If oxide thin film transistors are used to improve process uniformity, then manufacturing precision is improved, but reliability deteriorates due to threshold voltage drift under long-term pressure and high temperature
Solution Approach 1:
The patent implements periodic action by alternating the control of first and second gates in different frame periods. In odd frame periods, the first gate is controlled while the second gate is not, and in even frame periods, the second gate is controlled while the first gate is not. This periodic switching prevents continuous voltage application to the same gate, thereby reducing negative charge accumulation and threshold voltage drift over time.
2Productivity
If low-temperature polysilicon thin film transistors are used to improve mobility, then productivity is improved, but manufacturing precision deteriorates due to non-uniformity in electrical parameters
Solution Approach 1:
The patent applies parameter changes by dynamically adjusting the control state of the double-gate transistor's gates over time. By switching which gate is controlled in different frame periods, the system changes the electrical parameters experienced by the transistor, thereby compensating for initial non-uniformities in threshold voltage and mobility across different pixels.
3Productivity
If continuous gate voltage is applied to maintain transistor on-state, then productivity is improved, but reliability deteriorates due to negative charge capture into gate insulating layer
Solution Approach 1:
The patent implements periodic action by alternating the control of first and second gates in different frame periods. In odd frame periods, the first gate is controlled while the second gate is not, and in even frame periods, the second gate is controlled while the first gate is not. This periodic switching prevents continuous voltage application to the same gate, thereby reducing negative charge accumulation and threshold voltage drift over time.
Solution Approach 2:
The patent applies dynamics by making the gate control configuration time-dependent rather than static. The system dynamically switches which gate is active based on the frame period, transforming the transistor operation from a static continuous voltage state to a dynamic alternating state, thereby preventing permanent charge trapping.
Data Source
AI summary
A pixel driving circuit, a driving method for the pixel driving circuit, and a display panel are provided. The pixel driving circuit includes a writing module, a driving transistor, and a light-emitting element. The writing module is electrically connected to a data signal terminal, and is electrically connected to a first node and a second node. The driving transistor is a double-gate transistor. A first gate of the driving transistor is electrically connected to the first node. A second gate of the driving transistor is electrically connected to the second node. A source of the driving transistor is electrically connected to a first power signal terminal. A drain of the driving transistor is electrically connected to a third node. The light-emitting element is electrically connected to a second power signal terminal and electrically connected to the third node.