Double-Gate Semiconductor Device High Breakdown Voltage

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Solution Overview

Problem

Complementary metal-oxide semiconductor (CMOS) devices for RF power applications face a tradeoff between improved RF performance and higher breakdown voltage, with reduced breakdown voltage limiting voltage swing and usefulness in power applications.

Innovation Solution

A high-breakdown voltage double-gate semiconductor device is developed, comprising a metal-oxide-semiconductor gate and a junction gate, with control circuitry to manage the effective resistance between the drain and source, enhancing RF capability and power handling.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If gate geometries are reduced to improve RF performance, then RF capability is improved, but breakdown voltage decreases

Engineering Contradiction:
ImproveRF performanceVSAvoidbreakdown voltage
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The device is divided into two separate gates: a first gate (metal-oxide-semiconductor gate) and a second gate (junction gate), each contributing to different aspects of device performance. The first gate provides RF performance while the second gate provides breakdown voltage, allowing both functions to operate independently without compromising either parameter.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent combines two different gate structures (MOS gate and junction gate) into a single device architecture. This merging allows the device to simultaneously achieve the high-frequency performance of MOS structures and the high breakdown voltage of junction structures, resolving the tradeoff between RF performance and breakdown voltage.

Inventive Principle:
Principle #5Merging (Combining)

2Power

If transistor width is increased to provide greater current drive, then current drive capability is improved, but capacitive load increases

Engineering Contradiction:
Improvecurrent driveVSAvoidcapacitive load
Core Design Contradiction:
PowerVSUse of energy by moving object

Solution Approach 1:

The patent applies different doping concentrations and structural characteristics to different regions of the device. The drift region has specific doping characteristics that optimize current drive, while the gate structures are designed with specific geometries that minimize capacitive effects. This local optimization allows high current drive without proportionally increasing capacitive load.

Inventive Principle:
Principle #3Local quality

3Reliability

If drift region doping concentration is reduced to increase breakdown voltage, then breakdown voltage is improved, but on-state resistance increases

Engineering Contradiction:
Improvebreakdown voltageVSAvoidon-state resistance
Core Design Contradiction:
ReliabilityVSLoss of energy

Solution Approach 1:

The device separates the functions of breakdown voltage generation and current conduction into different structural components. The drift region with its specific doping profile handles breakdown voltage, while the dual gate structures and channel regions handle current conduction efficiency. This functional segmentation allows optimization of each parameter independently.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent employs a composite structure combining lightly-doped drift region material with differently-doped source and drain regions, along with dual gate materials. This composite approach allows the drift region to provide high breakdown voltage while the other regions compensate for resistance losses, achieving both high voltage and low on-state resistance simultaneously.

Inventive Principle:
Principle #40Composite materials

Data Source

PatentUS8188540B2High breakdown voltage double-gate semiconductor device
Publication Date: 2012.05.29 STMICROELECTRONICS INT NV
  • US8188540B2 patent drawing
  • US8188540B2 patent drawing
  • US8188540B2 patent drawing

AI summary

A double-gate semiconductor device includes a MOS gate and a junction gate, in which the bias of the junction gate is a function of the gate voltage of the MOS gate. The breakdown voltage of the double-gate semiconductor device is the sum of the breakdown voltages of the MOS gate and the junction gate. The double-gate semiconductor device provides improved RF capability in addition to operability at higher power levels as compared to conventional transistor devices. The double-gate semiconductor device may also be fabricated in a higher spatial density configuration such that a common implantation between the MOS gate and the junction gate is eliminated.