Double Gate Semiconductor Device for RF Capacitance Reduction
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
In RF devices on silicon-on-insulator substrates, the off-capacitance (Coff) and parasitic capacitance between the source/drain (Cds) are not low enough, particularly with the advent of 5G cellular mobile communication, necessitating a reduction in these capacitances to improve device performance.
Innovation Solution
A semiconductor device with a double gate structure is implemented, featuring a buried dielectric layer with a first and second gate structure on either side, and source/drain regions and contact structures disposed accordingly to reduce Coff and Cds, utilizing a buried oxide layer and carefully controlled channel region thickness to achieve complete depletion and minimize capacitance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If a conventional single gate structure is used on SOI substrate, then the device can be manufactured with standard IC technology, but the off-capacitance and parasitic capacitance between source/drain are not low enough
Solution Approach 1:
The gate structure is segmented into two separate gates: a front gate formed on the front surface of the SOI substrate and a back gate formed on the back surface. This segmentation allows independent control of the channel from both surfaces, enabling complete depletion of the channel and significant reduction of off-capacitance and parasitic capacitance while maintaining compatibility with standard IC manufacturing processes
Solution Approach 2:
The invention transitions from a conventional single-sided gate structure to a double-sided gate structure by utilizing the third dimension (depth/thickness) of the SOI substrate. The back gate is formed on the back surface of the substrate, creating a through-silicon via configuration that enables control of the channel from both top and bottom, thereby achieving complete channel depletion and reduced capacitance
2Object-affected harmful factors
If the channel region thickness is increased to reduce parasitic capacitance, then Coff and Cds decrease, but the device requires more complex fabrication processes to achieve complete depletion
Solution Approach 1:
The invention optimizes the thickness parameter of the channel region to be between 50-100 nm, which is thin enough to allow complete depletion by the double gate structure but thick enough to maintain device performance. This parameter optimization, combined with the double gate configuration, achieves complete channel depletion and reduced parasitic capacitance without requiring excessively complex fabrication processes
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The double gate structure effectively reduces off-capacitance and parasitic capacitance, enhancing signal transmission and reducing signal distortion in RF devices, particularly suitable for high-frequency applications like 5G communication.
Implementation Method 1
the channel region between the first source/drain region and the second source/drain region is completely depleted
Data Source
Figure 1~2
Figure 3~4
Figure 5
AI summary
A semiconductor device includes a buried dielectric layer, a first gate structure, a second gate structure, a first source/drain region, a second source/drain region, a first contact structure and a second contact structure. The first gate structure and the second gate structure disposed respectively in the front-side and backside of the dielectric layer, the first source/drain region and the second source/drain region are disposed between the first gate structure and the second gate structure, the first contact structure is disposed in the front-side of the dielectric layer and electrically coupled to the first source/drain region, the second contact structure is disposed in the backside of the dielectric layer and electrically coupled to the second source/drain region.